[llvm] [AArch64] Add assembly/disassembly for multi-vector AES instructions (PR #113307)

[Jonathan Thackray via llvm-commits]

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@@ -73,7 +73,7 @@ def SVEUnsupported : AArch64Unsupported {
                       SVE2Unsupported.F);
 }
 
-let F = [HasSME2p1, HasSVE2p1_or_HasSME2p1] in
+let F = [HasSME2p1, HasSVE2p1_or_HasSME2p1, HasSVE2p1orSSVE_AES] in
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jthackray wrote:

Sure, let's tidy up after.

https://github.com/llvm/llvm-project/pull/113307