[lld] a4ace3d - [PAC][lld] Fix reloc against adrp imm in PAC PLT header (#113429)

via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 23 09:48:01 PDT 2024


Author: Daniil Kovalev
Date: 2024-10-23T19:47:56+03:00
New Revision: a4ace3de1b390451ce5e41bce74b90dcd992ab61

URL: https://github.com/llvm/llvm-project/commit/a4ace3de1b390451ce5e41bce74b90dcd992ab61
DIFF: https://github.com/llvm/llvm-project/commit/a4ace3de1b390451ce5e41bce74b90dcd992ab61.diff

LOG: [PAC][lld] Fix reloc against adrp imm in PAC PLT header (#113429)

The PAC PLT header contains adrp instruction which immediate should be
filled. In https://reviews.llvm.org/D62609, the adrp instruction address
was calculated incorrectly. This patch resolves the issue.

The test is already present in test/ELF/aarch64-feature-pac.s

Added: 
    

Modified: 
    lld/ELF/Arch/AArch64.cpp

Removed: 
    


################################################################################
diff  --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index f4f867d019136e..28e0fce6a6f499 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -1048,7 +1048,7 @@ void AArch64BtiPac::writePltHeader(uint8_t *buf) const {
   memcpy(buf, pltData, sizeof(pltData));
 
   relocateNoSym(buf + 4, R_AARCH64_ADR_PREL_PG_HI21,
-                getAArch64Page(got + 16) - getAArch64Page(plt + 8));
+                getAArch64Page(got + 16) - getAArch64Page(plt + 4));
   relocateNoSym(buf + 8, R_AARCH64_LDST64_ABS_LO12_NC, got + 16);
   relocateNoSym(buf + 12, R_AARCH64_ADD_ABS_LO12_NC, got + 16);
   if (!btiHeader)


        


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