[llvm] [RISCV] Support llvm.masked.expandload intrinsic (PR #101954)

via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 23 02:10:45 PDT 2024


github-actions[bot] wrote:

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git-clang-format --diff f1ade1f874db066a46142cacbb67f80d272862ed 38b066230a6383c919604b97af52c7fb6c2e44ed --extensions cpp,h -- llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 669abf2431..4f70b7e9b4 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -11137,7 +11137,8 @@ SDValue RISCVTargetLowering::lowerMaskedLoad(SDValue Op,
     VL = getDefaultVLOps(VT, ContainerVT, DL, DAG, Subtarget).second;
 
   SDValue Result;
-  if (!IsUnmasked && IsExpandingLoad && Subtarget.hasOptimizedIndexedLoadStore()) {
+  if (!IsUnmasked && IsExpandingLoad &&
+      Subtarget.hasOptimizedIndexedLoadStore()) {
     MVT IndexVT = ContainerVT;
     if (ContainerVT.isFloatingPoint())
       IndexVT = IndexVT.changeVectorElementTypeToInteger();

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https://github.com/llvm/llvm-project/pull/101954


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