[llvm] [AArch64][GlobalISel] TableGen Patterns for Lane 0 Vector Insert (PR #105689)

David Green via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 23 01:39:40 PDT 2024


davemgreen wrote:

Chuong is back to Uni now. I know the other patches he had got in, I will try and take a look whether we can rebase this one too and get it in. Some things might have changed since it was created.

https://github.com/llvm/llvm-project/pull/105689


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