[clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v4 (PR #108636)

[via llvm-commits]

yonghong-song wrote:

> If our plan is to:
> 
>     * generate `zext` BPF 8- and 16-bit load-acquire for `atomic_load_zext_{8,16}`
> 
>     * (if needed) generate `sext` BPF 8- and 16-bit load-acquire for `atomic_load_sext_{8,16}`
> 
> 
> Then this problem needs to be solved, and I can include the author of [1ee6ce9](https://github.com/llvm/llvm-project/commit/1ee6ce9bad4d7d61e5c6d37ebd5bfa89b91096c6) into discussion.

Yes, I like what you proposed above. Let us involve upstream to see how the problem can resolved.



https://github.com/llvm/llvm-project/pull/108636