[llvm] [AARCH64] Add assembly/disassembly for FMMLA instructions (PR #113313)

[via llvm-commits]

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@@ -19,3 +19,15 @@ rax1 z0.d, z0.d, z0.d
 .arch armv9-a+sve2-bitperm
 bgrp z21.s, z10.s, z21.s
 // CHECK: bgrp z21.s, z10.s, z21.s
+
+.arch armv9-a+sve2+f8f16mm
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SpencerAbson wrote:

I believe `+sve2` is a default of `armv9-a`, so it might not be necessary in these.

https://github.com/llvm/llvm-project/pull/113313