[llvm] [NVPTX] Add support for clamped funnel shift intrinsics (PR #113228)

[Artem Belevich via llvm-commits]

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@@ -0,0 +1,70 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -march=nvptx -mcpu=sm_61 | FileCheck %s
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_61 | FileCheck %s
+
+target triple = "nvptx-nvidia-cuda"
+
+declare i32 @llvm.nvvm.fshr.clamp.i32(i32, i32, i32)
+declare i32 @llvm.nvvm.fshl.clamp.i32(i32, i32, i32)
+
+define i32 @fshr_clamp_r(i32 %a, i32 %b, i32 %c) {
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Artem-B wrote:

`a/b/c` could use the renaming to `hi/lo/n` to match the rest of the changes.

https://github.com/llvm/llvm-project/pull/113228