[llvm] [CodeGen][NewPM] Make MFProperties methods const (PR #113304)
Akshat Oke via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 22 05:47:52 PDT 2024
https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/113304
>From a96dde600d7210c40c8932502bdc0a4f373b1110 Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Tue, 22 Oct 2024 12:13:02 +0000
Subject: [PATCH] [CodeGen][NewPM] Make MFProperty methods const
Makes them congruent with the legacy PM methods.
---
llvm/include/llvm/CodeGen/MachineCSE.h | 2 +-
llvm/include/llvm/CodeGen/MachinePassManager.h | 4 ++--
llvm/include/llvm/CodeGen/RegAllocFast.h | 6 +++---
llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h | 2 +-
llvm/lib/Target/AMDGPU/GCNDPPCombine.h | 2 +-
llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.h | 2 +-
llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h | 2 +-
7 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineCSE.h b/llvm/include/llvm/CodeGen/MachineCSE.h
index f83c25bf391207..16a313508547db 100644
--- a/llvm/include/llvm/CodeGen/MachineCSE.h
+++ b/llvm/include/llvm/CodeGen/MachineCSE.h
@@ -18,7 +18,7 @@ class MachineCSEPass : public PassInfoMixin<MachineCSEPass> {
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
- MachineFunctionProperties getRequiredProperties() {
+ MachineFunctionProperties getRequiredProperties() const {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::IsSSA);
}
diff --git a/llvm/include/llvm/CodeGen/MachinePassManager.h b/llvm/include/llvm/CodeGen/MachinePassManager.h
index 253fabdac0019d..69b5f6e92940c4 100644
--- a/llvm/include/llvm/CodeGen/MachinePassManager.h
+++ b/llvm/include/llvm/CodeGen/MachinePassManager.h
@@ -41,7 +41,7 @@ using MachineFunctionAnalysisManager = AnalysisManager<MachineFunction>;
/// MachineFunctionProperties properly.
template <typename PassT> class MFPropsModifier {
public:
- MFPropsModifier(PassT &P_, MachineFunction &MF_) : P(P_), MF(MF_) {
+ MFPropsModifier(const PassT &P_, MachineFunction &MF_) : P(P_), MF(MF_) {
auto &MFProps = MF.getProperties();
#ifndef NDEBUG
if constexpr (has_get_required_properties_v<PassT>) {
@@ -71,7 +71,7 @@ template <typename PassT> class MFPropsModifier {
}
private:
- PassT &P;
+ const PassT &P;
MachineFunction &MF;
template <typename T>
diff --git a/llvm/include/llvm/CodeGen/RegAllocFast.h b/llvm/include/llvm/CodeGen/RegAllocFast.h
index c99c715daacf96..440264a06ae89e 100644
--- a/llvm/include/llvm/CodeGen/RegAllocFast.h
+++ b/llvm/include/llvm/CodeGen/RegAllocFast.h
@@ -27,12 +27,12 @@ class RegAllocFastPass : public PassInfoMixin<RegAllocFastPass> {
RegAllocFastPass(RegAllocFastPassOptions Opts = RegAllocFastPassOptions())
: Opts(Opts) {}
- MachineFunctionProperties getRequiredProperties() {
+ MachineFunctionProperties getRequiredProperties() const {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::NoPHIs);
}
- MachineFunctionProperties getSetProperties() {
+ MachineFunctionProperties getSetProperties() const {
if (Opts.ClearVRegs) {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::NoVRegs);
@@ -41,7 +41,7 @@ class RegAllocFastPass : public PassInfoMixin<RegAllocFastPass> {
return MachineFunctionProperties();
}
- MachineFunctionProperties getClearedProperties() {
+ MachineFunctionProperties getClearedProperties() const {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::IsSSA);
}
diff --git a/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h b/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
index 7f2a070c584347..d4d47f29cc8446 100644
--- a/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
+++ b/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
@@ -18,7 +18,7 @@ class TwoAddressInstructionPass
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
- MachineFunctionProperties getSetProperties() {
+ MachineFunctionProperties getSetProperties() const {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::TiedOpsRewritten);
}
diff --git a/llvm/lib/Target/AMDGPU/GCNDPPCombine.h b/llvm/lib/Target/AMDGPU/GCNDPPCombine.h
index 8f119054e6c0b0..ac45e578157ee0 100644
--- a/llvm/lib/Target/AMDGPU/GCNDPPCombine.h
+++ b/llvm/lib/Target/AMDGPU/GCNDPPCombine.h
@@ -17,7 +17,7 @@ class GCNDPPCombinePass : public PassInfoMixin<GCNDPPCombinePass> {
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MAM);
- MachineFunctionProperties getRequiredProperties() {
+ MachineFunctionProperties getRequiredProperties() const {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::IsSSA);
}
diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.h b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.h
index 6c20401d6bf5c1..33188c6ebb6715 100644
--- a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.h
+++ b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.h
@@ -19,7 +19,7 @@ class SILoadStoreOptimizerPass
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
- MachineFunctionProperties getRequiredProperties() {
+ MachineFunctionProperties getRequiredProperties() const {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::IsSSA);
}
diff --git a/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h b/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h
index 730b3f8c617bd3..a9ffb5705d094a 100644
--- a/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h
+++ b/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h
@@ -17,7 +17,7 @@ class SILowerSGPRSpillsPass : public PassInfoMixin<SILowerSGPRSpillsPass> {
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
- MachineFunctionProperties getClearedProperties() {
+ MachineFunctionProperties getClearedProperties() const {
// SILowerSGPRSpills introduces new Virtual VGPRs for spilling SGPRs.
return MachineFunctionProperties()
.set(MachineFunctionProperties::Property::IsSSA)
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