[llvm] b3acb25 - [AMDGPU] Don't rely on !eq comparing int with bits<5>. NFC. (#113279)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 22 04:20:40 PDT 2024
Author: Jay Foad
Date: 2024-10-22T12:20:36+01:00
New Revision: b3acb25735fdeeafcc0944ad85d2af27fe332c10
URL: https://github.com/llvm/llvm-project/commit/b3acb25735fdeeafcc0944ad85d2af27fe332c10
DIFF: https://github.com/llvm/llvm-project/commit/b3acb25735fdeeafcc0944ad85d2af27fe332c10.diff
LOG: [AMDGPU] Don't rely on !eq comparing int with bits<5>. NFC. (#113279)
Tweak VOP2eInst_Base so that it does not rely on !eq comparing an int
value (-1) with a bits<5> value. This is to avoid a change in behaviour
when #112904 lands, which is a bug fix which has the side effect of
implicitly casting template arguments to the declared template parameter
type.
Added:
Modified:
llvm/lib/Target/AMDGPU/VOP2Instructions.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
index e83ea57c61df13..fbde3bb7d14111 100644
--- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -287,7 +287,7 @@ multiclass
let SchedRW = [Write32Bit] in {
let Uses = !if(useSGPRInput, [VCC, EXEC], [EXEC]) in {
- if !eq(VOPDOp, -1) then
+ if !empty(VOPDName) then
def _e32 : VOP2_Pseudo <opName, P>,
Commutable_REV<revOp#"_e32", !eq(revOp, opName)>;
else
@@ -319,7 +319,7 @@ multiclass
multiclass
VOP2eInst<string opName, VOPProfile P, SDPatternOperator node = null_frag,
string revOp = opName, bit useSGPRInput = !eq(P.NumSrcArgs, 3)>
- : VOP2eInst_Base<opName, P, -1, "", node, revOp, useSGPRInput>;
+ : VOP2eInst_Base<opName, P, 0, "", node, revOp, useSGPRInput>;
multiclass
VOP2eInst_VOPD<string opName, VOPProfile P, bits<5> VOPDOp, string VOPDName,
More information about the llvm-commits
mailing list