[llvm] [X86][AVX512] Use comx for compare (PR #113098)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 22 02:08:01 PDT 2024
================
@@ -49520,6 +49520,15 @@ static SDValue combineCompareEqual(SDNode *N, SelectionDAG &DAG,
// FIXME: need symbolic constants for these magic numbers.
// See X86ATTInstPrinter.cpp:printSSECC().
unsigned x86cc = (cc0 == X86::COND_E) ? 0 : 4;
+
+ // VCOMXSS simplifies conditional code sequence into single setcc node.
+ // Earlier until COMI, it required upto 2 SETCC's to test CC.
----------------
mahesh-attarde wrote:
```
Optimized type-legalized selection DAG: %bb.0 'oeq:'
SelectionDAG has 11 nodes:
t0: ch,glue = EntryToken
t2: f32,ch = CopyFromReg t0, Register:f32 %0
t4: f32,ch = CopyFromReg t0, Register:f32 %1
t14: i8 = setcc t2, t4, setoeq:ch
t10: ch,glue = CopyToReg t0, Register:i8 $al, t14
t11: ch = X86ISD::RET_GLUE t10, TargetConstant:i32<0>, Register:i8 $al, t10:1
Legalized selection DAG: %bb.0 'oeq:'
SelectionDAG has 15 nodes:
t0: ch,glue = EntryToken
t24: i8 = X86ISD::SETCC TargetConstant:i8<4>, t20
t22: i8 = X86ISD::SETCC TargetConstant:i8<11>, t20
t19: i8 = and t24, t22
t10: ch,glue = CopyToReg t0, Register:i8 $al, t19
t2: f32,ch = CopyFromReg t0, Register:f32 %0
t4: f32,ch = CopyFromReg t0, Register:f32 %1
t20: i32 = X86ISD::FCMP t2, t4
t11: ch = X86ISD::RET_GLUE t10, TargetConstant:i32<0>, Register:i8 $al, t10:1
```
If i understand correctly you are asking to remove t19, t22 and t24, is that correct?
https://github.com/llvm/llvm-project/pull/113098
More information about the llvm-commits
mailing list