[llvm] [llvm][TableGen] Allow physical registers in patterns for GlobalISel emitter (PR #113127)

[Sergei Barannikov via llvm-commits]

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@@ -2092,16 +2092,26 @@ Expected<RuleMatcher> GlobalISelEmitter::runOnPattern(const PatternToMatch &P) {
       MatchedRC = *MaybeRegClass;
     } else if (MatchedRC.get<const Record *>()->isSubClassOf("RegisterOperand"))
       MatchedRC = MatchedRC.get<const Record *>()->getValueAsDef("RegClass");
-    else if (!MatchedRC.get<const Record *>()->isSubClassOf("RegisterClass"))
+    else if (MatchedRC.get<const Record *>()->isSubClassOf("Register")) {
+      auto MaybeRegClass =
+          CGRegs.getRegClassForRegister(MatchedRC.get<const Record *>());
+      if (!MaybeRegClass)
+        return failedImport("Cannot infer register class for register");
+      MatchedRC = MaybeRegClass;
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s-barannikov wrote:

Physical registers need their own matcher checking for exact match rather than for any register in some register class.
Is there a testcase for this change?


https://github.com/llvm/llvm-project/pull/113127