[llvm] [AMDGPU][MIR] Serialize SpillPhysVGPRs (PR #113129)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 21 14:07:54 PDT 2024
================
@@ -1718,6 +1718,13 @@ bool GCNTargetMachine::parseMachineFunctionInfo(
MFI->reserveWWMRegister(ParsedReg);
}
+ for (const auto &YamlRegStr : YamlMFI.SpillPhysVGPRS) {
+ Register ParsedReg;
+ if (parseRegister(YamlRegStr, ParsedReg))
+ return true;
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arsenm wrote:
Test the failing parse case
https://github.com/llvm/llvm-project/pull/113129
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