[llvm] [Xtensa] Implement branch analysis. (PR #110959)
Andrei Safronov via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 21 10:43:48 PDT 2024
================
@@ -185,3 +185,301 @@ void XtensaInstrInfo::loadImmediate(MachineBasicBlock &MBB,
report_fatal_error("Unsupported load immediate value");
}
}
+
+bool XtensaInstrInfo::reverseBranchCondition(
+ SmallVectorImpl<MachineOperand> &Cond) const {
+ assert(Cond.size() <= 4 && "Invalid branch condition!");
+
+ switch (Cond[0].getImm()) {
+ case Xtensa::BEQ:
+ Cond[0].setImm(Xtensa::BNE);
+ return false;
+ case Xtensa::BNE:
+ Cond[0].setImm(Xtensa::BEQ);
+ return false;
+ case Xtensa::BLT:
+ Cond[0].setImm(Xtensa::BGE);
+ return false;
+ case Xtensa::BGE:
+ Cond[0].setImm(Xtensa::BLT);
+ return false;
+ case Xtensa::BLTU:
+ Cond[0].setImm(Xtensa::BGEU);
+ return false;
+ case Xtensa::BGEU:
+ Cond[0].setImm(Xtensa::BLTU);
+ return false;
+
+ case Xtensa::BEQI:
+ Cond[0].setImm(Xtensa::BNEI);
+ return false;
+ case Xtensa::BNEI:
+ Cond[0].setImm(Xtensa::BEQI);
+ return false;
+ case Xtensa::BGEI:
+ Cond[0].setImm(Xtensa::BLTI);
+ return false;
+ case Xtensa::BLTI:
+ Cond[0].setImm(Xtensa::BGEI);
+ return false;
+ case Xtensa::BGEUI:
+ Cond[0].setImm(Xtensa::BLTUI);
+ return false;
+ case Xtensa::BLTUI:
+ Cond[0].setImm(Xtensa::BGEUI);
+ return false;
+
+ case Xtensa::BEQZ:
+ Cond[0].setImm(Xtensa::BNEZ);
+ return false;
+ case Xtensa::BNEZ:
+ Cond[0].setImm(Xtensa::BEQZ);
+ return false;
+ case Xtensa::BLTZ:
+ Cond[0].setImm(Xtensa::BGEZ);
+ return false;
+ case Xtensa::BGEZ:
+ Cond[0].setImm(Xtensa::BLTZ);
+ return false;
+
+ default:
+ report_fatal_error("Invalid branch condition!");
+ }
+}
+
+bool XtensaInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
+ MachineBasicBlock *&TBB,
+ MachineBasicBlock *&FBB,
+ SmallVectorImpl<MachineOperand> &Cond,
+ bool AllowModify = false) const {
+ // Most of the code and comments here are boilerplate.
+
+ // Start from the bottom of the block and work up, examining the
+ // terminator instructions.
+ MachineBasicBlock::iterator I = MBB.end();
+ while (I != MBB.begin()) {
+ --I;
+ if (I->isDebugValue())
+ continue;
----------------
andreisfr wrote:
I prepared new test which checks analyzeBranch and reverseBranchCondition functionality. I hope I understand your comment correctly.
https://github.com/llvm/llvm-project/pull/110959
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