[llvm] [TableGen] Added submulticlass typechecking to template arg values. (PR #112904)

[Jay Foad via llvm-commits]

jayfoad wrote:

The AMDGPU changes highlight a change in behaviour caused by your patch. Here's a simple example:
```
class C {
  bit x;
}
multiclass M1<bits<8> Val> {
  let x = !eq(Val, -1) in def NAME : C;
}
multiclass M2 : M1<-1>;
defm X : M2;
```
Before your patch I get:
```
def X {	// C
  bit x = 1;
}
```
After your patch I get:
```
def X {	// C
  bit x = 0;
}
```
Why did this change? Is the new behaviour more correct than the old behaviour? Can you please also add something like this as a test case?

In any case the AMDGPU code should probably be changed not to rely on equality of a `bits<5>` value and `-1`.

https://github.com/llvm/llvm-project/pull/112904