[llvm] Revert "[X86] Invert (and X, ~(and ~Y, Z)) back into (and X, (or Y, ~Z)) (#109215)" (PR #113181)
Miguel Saldivar via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 21 09:09:27 PDT 2024
https://github.com/Saldivarcher updated https://github.com/llvm/llvm-project/pull/113181
>From f35e3b9b3e1f0e96b7e6aadf0c443ab00541e979 Mon Sep 17 00:00:00 2001
From: Miguel Saldivar <miguel.saldivar at hpe.com>
Date: Mon, 21 Oct 2024 10:54:37 -0500
Subject: [PATCH 1/3] Revert "[X86] combineAndNotOrIntoAndNotAnd - don't
attempt with constant operands"
This reverts commit ec78f0da0e9b1b8e2b2323e434ea742e272dd913.
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 15 +++----
llvm/test/CodeGen/X86/pr108731.ll | 53 +------------------------
2 files changed, 8 insertions(+), 60 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index bcb84add65d83e..9b4f904a9c2e59 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -50047,15 +50047,12 @@ static SDValue combineAndNotOrIntoAndNotAnd(SDNode *N, SelectionDAG &DAG) {
return SDValue();
SDValue X, Y, Z;
- if (sd_match(N, m_And(m_Value(X),
- m_OneUse(m_Or(m_Value(Y), m_Not(m_Value(Z))))))) {
- // Don't fold if Y is a constant to prevent infinite loops.
- if (!isa<ConstantSDNode>(Y))
- return DAG.getNode(
- ISD::AND, DL, VT, X,
- DAG.getNOT(
- DL, DAG.getNode(ISD::AND, DL, VT, DAG.getNOT(DL, Y, VT), Z), VT));
- }
+ if (sd_match(
+ N, m_And(m_Value(X), m_OneUse(m_Or(m_Value(Y), m_Not(m_Value(Z)))))))
+ return DAG.getNode(
+ ISD::AND, DL, VT, X,
+ DAG.getNOT(DL, DAG.getNode(ISD::AND, DL, VT, DAG.getNOT(DL, Y, VT), Z),
+ VT));
return SDValue();
}
diff --git a/llvm/test/CodeGen/X86/pr108731.ll b/llvm/test/CodeGen/X86/pr108731.ll
index 473b4f7f4da2e3..68ff3259362f70 100644
--- a/llvm/test/CodeGen/X86/pr108731.ll
+++ b/llvm/test/CodeGen/X86/pr108731.ll
@@ -141,54 +141,5 @@ Entry:
ret <16 x i8> %and3
}
-define <32 x i8> @test_v32i8(<32 x i8> %w, <32 x i8> %x, <32 x i8> %y, <32 x i8> %z) {
-; NOBMI-LABEL: test_v32i8:
-; NOBMI: # %bb.0: # %Entry
-; NOBMI-NEXT: andps %xmm4, %xmm2
-; NOBMI-NEXT: andps %xmm5, %xmm3
-; NOBMI-NEXT: andnps %xmm1, %xmm3
-; NOBMI-NEXT: andnps %xmm0, %xmm2
-; NOBMI-NEXT: andnps %xmm6, %xmm4
-; NOBMI-NEXT: andnps %xmm2, %xmm4
-; NOBMI-NEXT: andnps %xmm7, %xmm5
-; NOBMI-NEXT: andnps %xmm3, %xmm5
-; NOBMI-NEXT: movaps %xmm4, %xmm0
-; NOBMI-NEXT: movaps %xmm5, %xmm1
-; NOBMI-NEXT: retq
-;
-; BMI-LABEL: test_v32i8:
-; BMI: # %bb.0: # %Entry
-; BMI-NEXT: vandps %ymm1, %ymm2, %ymm1
-; BMI-NEXT: vandnps %ymm0, %ymm1, %ymm0
-; BMI-NEXT: vandnps %ymm3, %ymm2, %ymm1
-; BMI-NEXT: vandnps %ymm0, %ymm1, %ymm0
-; BMI-NEXT: retq
-Entry:
- %and1 = and <32 x i8> %y, %x
- %xor1 = xor <32 x i8> %and1, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
- %and2 = and <32 x i8> %xor1, %w
- %.not = xor <32 x i8> %z, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
- %or1 = or <32 x i8> %.not, %y
- %and3 = and <32 x i8> %and2, %or1
- ret <32 x i8> %and3
-}
-
-; PR112347 - don't fold if we'd be inverting a constant, as demorgan normalisation will invert it back again.
-define void @PR112347(ptr %p0, ptr %p1, ptr %p2) {
-; CHECK-LABEL: PR112347:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl (%rdi), %eax
-; CHECK-NEXT: notl %eax
-; CHECK-NEXT: orl $-16777204, %eax # imm = 0xFF00000C
-; CHECK-NEXT: andl (%rsi), %eax
-; CHECK-NEXT: movl %eax, (%rdx)
-; CHECK-NEXT: retq
- %load0 = load i32, ptr %p0, align 1
- %load1 = load i32, ptr %p1, align 4
- %not = xor i32 %load0, -1
- %top = or i32 %not, -16777204
- %mask = and i32 %load1, %top
- store i32 %mask, ptr %p2, align 4
- ret void
-}
-
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
>From 5cf756a79a4707cb5cc5fc9b97928cdb9582fda4 Mon Sep 17 00:00:00 2001
From: Miguel Saldivar <miguel.saldivar at hpe.com>
Date: Mon, 21 Oct 2024 10:57:03 -0500
Subject: [PATCH 2/3] Revert "[X86] Extend ANDNOT fold tests to cover all legal
scalars and 256-bit vectors"
This reverts commit 9ee9e0e3b2323e7cca00a5223ace5e25e7ed1c1f.
---
llvm/test/CodeGen/X86/pr108731.ll | 95 ++-----------------------------
1 file changed, 6 insertions(+), 89 deletions(-)
diff --git a/llvm/test/CodeGen/X86/pr108731.ll b/llvm/test/CodeGen/X86/pr108731.ll
index 68ff3259362f70..ee64a6313ca3a5 100644
--- a/llvm/test/CodeGen/X86/pr108731.ll
+++ b/llvm/test/CodeGen/X86/pr108731.ll
@@ -2,8 +2,8 @@
; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,NOBMI
; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,BMI
-define i64 @test_i64(i64 %w, i64 %x, i64 %y, i64 %z) {
-; NOBMI-LABEL: test_i64:
+define i64 @foo(i64 %w, i64 %x, i64 %y, i64 %z) {
+; NOBMI-LABEL: foo:
; NOBMI: # %bb.0: # %Entry
; NOBMI-NEXT: movq %rcx, %rax
; NOBMI-NEXT: andq %rdx, %rsi
@@ -14,7 +14,7 @@ define i64 @test_i64(i64 %w, i64 %x, i64 %y, i64 %z) {
; NOBMI-NEXT: andq %rsi, %rax
; NOBMI-NEXT: retq
;
-; BMI-LABEL: test_i64:
+; BMI-LABEL: foo:
; BMI: # %bb.0: # %Entry
; BMI-NEXT: andq %rdx, %rsi
; BMI-NEXT: andnq %rdi, %rsi, %rax
@@ -31,91 +31,8 @@ Entry:
ret i64 %and3
}
-define i32 @test_i32(i32 %w, i32 %x, i32 %y, i32 %z) {
-; NOBMI-LABEL: test_i32:
-; NOBMI: # %bb.0: # %Entry
-; NOBMI-NEXT: movl %ecx, %eax
-; NOBMI-NEXT: andl %edx, %esi
-; NOBMI-NEXT: notl %esi
-; NOBMI-NEXT: andl %edi, %esi
-; NOBMI-NEXT: notl %eax
-; NOBMI-NEXT: orl %edx, %eax
-; NOBMI-NEXT: andl %esi, %eax
-; NOBMI-NEXT: retq
-;
-; BMI-LABEL: test_i32:
-; BMI: # %bb.0: # %Entry
-; BMI-NEXT: andl %edx, %esi
-; BMI-NEXT: andnl %edi, %esi, %eax
-; BMI-NEXT: andnl %ecx, %edx, %ecx
-; BMI-NEXT: andnl %eax, %ecx, %eax
-; BMI-NEXT: retq
-Entry:
- %and1 = and i32 %y, %x
- %xor1 = xor i32 %and1, -1
- %and2 = and i32 %xor1, %w
- %.not = xor i32 %z, -1
- %or1 = or i32 %.not, %y
- %and3 = and i32 %and2, %or1
- ret i32 %and3
-}
-
-define i16 @test_i16(i16 %w, i16 %x, i16 %y, i16 %z) {
-; NOBMI-LABEL: test_i16:
-; NOBMI: # %bb.0: # %Entry
-; NOBMI-NEXT: movl %ecx, %eax
-; NOBMI-NEXT: andl %edx, %esi
-; NOBMI-NEXT: notl %esi
-; NOBMI-NEXT: andl %edi, %esi
-; NOBMI-NEXT: notl %eax
-; NOBMI-NEXT: orl %edx, %eax
-; NOBMI-NEXT: andl %esi, %eax
-; NOBMI-NEXT: # kill: def $ax killed $ax killed $eax
-; NOBMI-NEXT: retq
-;
-; BMI-LABEL: test_i16:
-; BMI: # %bb.0: # %Entry
-; BMI-NEXT: andl %edx, %esi
-; BMI-NEXT: andnl %edi, %esi, %eax
-; BMI-NEXT: notl %ecx
-; BMI-NEXT: orl %edx, %ecx
-; BMI-NEXT: andl %ecx, %eax
-; BMI-NEXT: # kill: def $ax killed $ax killed $eax
-; BMI-NEXT: retq
-Entry:
- %and1 = and i16 %y, %x
- %xor1 = xor i16 %and1, -1
- %and2 = and i16 %xor1, %w
- %.not = xor i16 %z, -1
- %or1 = or i16 %.not, %y
- %and3 = and i16 %and2, %or1
- ret i16 %and3
-}
-
-define i8 @test_i8(i8 %w, i8 %x, i8 %y, i8 %z) {
-; CHECK-LABEL: test_i8:
-; CHECK: # %bb.0: # %Entry
-; CHECK-NEXT: movl %edx, %eax
-; CHECK-NEXT: andl %edx, %esi
-; CHECK-NEXT: notb %sil
-; CHECK-NEXT: andb %dil, %sil
-; CHECK-NEXT: notb %cl
-; CHECK-NEXT: orb %cl, %al
-; CHECK-NEXT: andb %sil, %al
-; CHECK-NEXT: # kill: def $al killed $al killed $eax
-; CHECK-NEXT: retq
-Entry:
- %and1 = and i8 %y, %x
- %xor1 = xor i8 %and1, -1
- %and2 = and i8 %xor1, %w
- %.not = xor i8 %z, -1
- %or1 = or i8 %.not, %y
- %and3 = and i8 %and2, %or1
- ret i8 %and3
-}
-
-define <16 x i8> @test_v16i8(<16 x i8> %w, <16 x i8> %x, <16 x i8> %y, <16 x i8> %z) {
-; NOBMI-LABEL: test_v16i8:
+define <16 x i8> @fooVec(<16 x i8> %w, <16 x i8> %x, <16 x i8> %y, <16 x i8> %z) {
+; NOBMI-LABEL: fooVec:
; NOBMI: # %bb.0: # %Entry
; NOBMI-NEXT: andps %xmm2, %xmm1
; NOBMI-NEXT: andnps %xmm0, %xmm1
@@ -124,7 +41,7 @@ define <16 x i8> @test_v16i8(<16 x i8> %w, <16 x i8> %x, <16 x i8> %y, <16 x i8>
; NOBMI-NEXT: movaps %xmm2, %xmm0
; NOBMI-NEXT: retq
;
-; BMI-LABEL: test_v16i8:
+; BMI-LABEL: fooVec:
; BMI: # %bb.0: # %Entry
; BMI-NEXT: vandps %xmm1, %xmm2, %xmm1
; BMI-NEXT: vandnps %xmm0, %xmm1, %xmm0
>From 7fd098ad1ff9645164a9d78bec4ea5804387898a Mon Sep 17 00:00:00 2001
From: Miguel Saldivar <miguel.saldivar at hpe.com>
Date: Mon, 21 Oct 2024 10:57:27 -0500
Subject: [PATCH 3/3] Revert "[X86] Invert (and X, ~(and ~Y, Z)) back into (and
X, (or Y, ~Z)) (#109215)"
This reverts commit 6fd229a655f521a9f58d40c671e5cab4ea3ea87b.
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 25 -------------------------
1 file changed, 25 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9b4f904a9c2e59..1b6f4fe0eec2db 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -50035,28 +50035,6 @@ static bool hasBZHI(const X86Subtarget &Subtarget, MVT VT) {
(VT == MVT::i32 || (VT == MVT::i64 && Subtarget.is64Bit()));
}
-/// Folds (and X, (or Y, ~Z)) --> (and X, ~(and ~Y, Z))
-/// This undoes the inverse fold performed in InstCombine
-static SDValue combineAndNotOrIntoAndNotAnd(SDNode *N, SelectionDAG &DAG) {
-
- using namespace llvm::SDPatternMatch;
- MVT VT = N->getSimpleValueType(0);
- SDLoc DL(N);
- const TargetLowering &TLI = DAG.getTargetLoweringInfo();
- if (!TLI.hasAndNot(SDValue(N, 0)))
- return SDValue();
-
- SDValue X, Y, Z;
- if (sd_match(
- N, m_And(m_Value(X), m_OneUse(m_Or(m_Value(Y), m_Not(m_Value(Z)))))))
- return DAG.getNode(
- ISD::AND, DL, VT, X,
- DAG.getNOT(DL, DAG.getNode(ISD::AND, DL, VT, DAG.getNOT(DL, Y, VT), Z),
- VT));
-
- return SDValue();
-}
-
// This function recognizes cases where X86 bzhi instruction can replace and
// 'and-load' sequence.
// In case of loading integer value from an array of constants which is defined
@@ -50548,9 +50526,6 @@ static SDValue combineAnd(SDNode *N, SelectionDAG &DAG,
if (SDValue R = combineAndLoadToBZHI(N, DAG, Subtarget))
return R;
- if (SDValue R = combineAndNotOrIntoAndNotAnd(N, DAG))
- return R;
-
// fold (and (mul x, c1), c2) -> (mul x, (and c1, c2))
// iff c2 is all/no bits mask - i.e. a select-with-zero mask.
// TODO: Handle PMULDQ/PMULUDQ/VPMADDWD/VPMADDUBSW?
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