[llvm] 8b46d40 - [RISCV] Re-generate orc-b-patterns.ll for store clustering. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2024-10-11T14:28:51-07:00
New Revision: 8b46d40221f3c302e9c28e3ad7c79767f905a862

URL: https://github.com/llvm/llvm-project/commit/8b46d40221f3c302e9c28e3ad7c79767f905a862
DIFF: https://github.com/llvm/llvm-project/commit/8b46d40221f3c302e9c28e3ad7c79767f905a862.diff

LOG: [RISCV] Re-generate orc-b-patterns.ll for store clustering. NFC

The patch added orc-b-patterns.ll landed while store clustering was
still in review.

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/orc-b-patterns.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/orc-b-patterns.ll b/llvm/test/CodeGen/RISCV/orc-b-patterns.ll
index 184e66c14b33fc..5ede992e844f15 100644
--- a/llvm/test/CodeGen/RISCV/orc-b-patterns.ll
+++ b/llvm/test/CodeGen/RISCV/orc-b-patterns.ll
@@ -339,8 +339,8 @@ define i32 @orc_b_i32_sub_shl8x_x_b1_both_used(i32  %x, ptr %arr) {
 ; CHECK-NEXT:    and a0, a0, a2
 ; CHECK-NEXT:    slli a2, a0, 7
 ; CHECK-NEXT:    srli a3, a0, 1
-; CHECK-NEXT:    sw a2, 0(a1)
 ; CHECK-NEXT:    sub a0, a2, a3
+; CHECK-NEXT:    sw a2, 0(a1)
 ; CHECK-NEXT:    sw a3, 4(a1)
 ; CHECK-NEXT:    ret
 entry: