[llvm] [RISCV][GISEL] instruction-select for G_SPLAT_VECTOR (PR #111193)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 11 14:11:45 PDT 2024
topperc wrote:
> ```
> void RISCVInstructionSelector::renderImm(MachineInstrBuilder &MIB,
> const MachineInstr &MI,
> int OpIdx) const {
> assert(MI.getOpcode() == TargetOpcode::G_CONSTANT && OpIdx == -1 &&
> "Expected G_CONSTANT");
> int64_t CstVal = MI.getOperand(1).getCImm()->getSExtValue();
> MIB.addImm(CstVal);
> }
> ```
>
> Why must `MI` be a G_CONSTANT? Couldn't it be instead a RISCV::IConstant (sorry for the bad name)? To avoid building G_X in the instruction selector.
So you trust us to build a RISCV::IConstant with legal operands, but you don't trust us to know what G_CONSTANT is legal?
We still need to support G_CONSTANT too for future patches that will create G_VMV_V_X_VL/G_VFMV_F_VL from intrinsics.
https://github.com/llvm/llvm-project/pull/111193
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