[llvm] [GlobalIsel] Combine zext of trunc (episode II) (PR #108305)
Thorsten Schütt via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 11 11:19:52 PDT 2024
================
@@ -156,6 +159,9 @@ define void @constrained_if_register_class() {
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB4_4: ; %bb8
; CHECK-NEXT: s_cmp_lg_u32 s4, 0
+; CHECK-NEXT: s_cselect_b32 s4, 1, 0
+; CHECK-NEXT: s_and_b32 s4, s4, 1
+; CHECK-NEXT: s_cmp_lg_u32 s4, 0
----------------
tschuett wrote:
I honestly don't know, but this regression pattern occurs several times in AMDGPU.
https://github.com/llvm/llvm-project/pull/108305
More information about the llvm-commits
mailing list