[llvm] 126ed16 - [ARM] Fix formatting (NFC)

[Kazu Hirata via llvm-commits]

Author: Kazu Hirata
Date: 2024-10-10T20:30:04-07:00
New Revision: 126ed16525c92af1025a86b582c087d213b47145

URL: https://github.com/llvm/llvm-project/commit/126ed16525c92af1025a86b582c087d213b47145
DIFF: https://github.com/llvm/llvm-project/commit/126ed16525c92af1025a86b582c087d213b47145.diff

LOG: [ARM] Fix formatting (NFC)

I'm about to post a PR in this area.

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index b042ee69edd26c..b151a0116a9c41 100644
--- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -2531,7 +2531,7 @@ bool
 ARMPreAllocLoadStoreOpt::RescheduleLoadStoreInstrs(MachineBasicBlock *MBB) {
   bool RetVal = false;
 
-  DenseMap<MachineInstr*, unsigned> MI2LocMap;
+  DenseMap<MachineInstr *, unsigned> MI2LocMap;
   using MapIt = DenseMap<unsigned, SmallVector<MachineInstr *, 4>>::iterator;
   using Base2InstMap = DenseMap<unsigned, SmallVector<MachineInstr *, 4>>;
   using BaseVec = SmallVector<unsigned, 4>;
@@ -2570,7 +2570,7 @@ ARMPreAllocLoadStoreOpt::RescheduleLoadStoreInstrs(MachineBasicBlock *MBB) {
       Register Base = MI.getOperand(1).getReg();
       int Offset = getMemoryOpOffset(MI);
       bool StopHere = false;
-      auto FindBases = [&] (Base2InstMap &Base2Ops, BaseVec &Bases) {
+      auto FindBases = [&](Base2InstMap &Base2Ops, BaseVec &Bases) {
         MapIt BI = Base2Ops.find(Base);
         if (BI == Base2Ops.end()) {
           Base2Ops[Base].push_back(&MI);