[llvm] [HWASAN] Use sign extension in memToShadow() and untagPointer() (PR #103727)

Samuel Holland via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 10 10:14:02 PDT 2024


https://github.com/SiFiveHolland updated https://github.com/llvm/llvm-project/pull/103727

>From 0ddf4eb9c4de10b74896520ab5c9af5443abda7e Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel.holland at sifive.com>
Date: Fri, 9 Aug 2024 18:13:31 -0700
Subject: [PATCH] [HWASAN] Use sign extension in memToShadow() and
 untagPointer()

This allows the shift in untagPointer() to be folded with the shift in
memToShadow(), and works for both user and kernel HWASAN. On AArch64,
the sequence collapses to a single sbfx instruction, and on RISC-V it
avoids consuming a register to hold the shifted mask byte.

This is a backward-compatible change because (for a constant ShadowBase)
it only affects the top bits of the pointer returned from memToShadow(),
which are ignored by hardware anyway. Note that the AArch64 outline
assembly already uses a sbfx instruction for these combined operations.

Additionally use the original tagged pointer to compute the inline tag
address, to avoid needing to keep the untagged pointer live.
---
 .../Instrumentation/HWAddressSanitizer.cpp    |   25 +-
 .../RISCV/alloca-with-calls.ll                |   84 +-
 .../HWAddressSanitizer/RISCV/alloca.ll        |   82 +-
 .../HWAddressSanitizer/RISCV/atomic.ll        |   26 +-
 .../HWAddressSanitizer/RISCV/basic.ll         | 2347 +++++++++--------
 .../RISCV/exception-lifetime.ll               |  117 +-
 .../RISCV/use-after-scope-setjmp.ll           |   82 +-
 .../HWAddressSanitizer/X86/alloca-array.ll    |   38 +-
 .../X86/alloca-with-calls.ll                  |   17 +-
 .../HWAddressSanitizer/X86/alloca.ll          |  265 +-
 .../HWAddressSanitizer/X86/basic.ll           |  346 +--
 .../HWAddressSanitizer/alloca-array.ll        |   74 +-
 .../HWAddressSanitizer/alloca-compat.ll       |   37 +-
 .../HWAddressSanitizer/alloca-with-calls.ll   |   37 +-
 .../HWAddressSanitizer/alloca.ll              |   82 +-
 .../HWAddressSanitizer/basic.ll               | 1210 ++++-----
 .../HWAddressSanitizer/exception-lifetime.ll  |   68 +-
 .../HWAddressSanitizer/globals-access.ll      |   11 +-
 .../HWAddressSanitizer/kernel-alloca.ll       |   37 +-
 .../HWAddressSanitizer/kernel.ll              |  160 +-
 .../HWAddressSanitizer/prologue.ll            |  265 +-
 .../use-after-scope-setjmp.ll                 |   37 +-
 .../HWAddressSanitizer/use-after-scope.ll     | 1302 ++++-----
 23 files changed, 3579 insertions(+), 3170 deletions(-)

diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
index cc7f20cffea771..2b9bd5b6644bf6 100644
--- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -314,7 +314,6 @@ class HWAddressSanitizer {
   struct ShadowTagCheckInfo {
     Instruction *TagMismatchTerm = nullptr;
     Value *PtrLong = nullptr;
-    Value *AddrLong = nullptr;
     Value *PtrTag = nullptr;
     Value *MemTag = nullptr;
   };
@@ -967,7 +966,7 @@ void HWAddressSanitizer::untagPointerOperand(Instruction *I, Value *Addr) {
 
 Value *HWAddressSanitizer::memToShadow(Value *Mem, IRBuilder<> &IRB) {
   // Mem >> Scale
-  Value *Shadow = IRB.CreateLShr(Mem, Mapping.scale());
+  Value *Shadow = IRB.CreateAShr(Mem, Mapping.scale());
   if (Mapping.isFixed() && Mapping.offset() == 0)
     return IRB.CreateIntToPtr(Shadow, PtrTy);
   // (Mem >> Scale) + Offset
@@ -994,8 +993,8 @@ HWAddressSanitizer::insertShadowTagCheck(Value *Ptr, Instruction *InsertBefore,
   R.PtrLong = IRB.CreatePointerCast(Ptr, IntptrTy);
   R.PtrTag =
       IRB.CreateTrunc(IRB.CreateLShr(R.PtrLong, PointerTagShift), Int8Ty);
-  R.AddrLong = untagPointer(IRB, R.PtrLong);
-  Value *Shadow = memToShadow(R.AddrLong, IRB);
+  Value *AddrLong = untagPointer(IRB, R.PtrLong);
+  Value *Shadow = memToShadow(AddrLong, IRB);
   R.MemTag = IRB.CreateLoad(Int8Ty, Shadow);
   Value *TagMismatch = IRB.CreateICmpNE(R.PtrTag, R.MemTag);
 
@@ -1084,7 +1083,7 @@ void HWAddressSanitizer::instrumentMemAccessInline(Value *Ptr, bool IsWrite,
                             LI, CheckFailTerm->getParent());
 
   IRB.SetInsertPoint(TCI.TagMismatchTerm);
-  Value *InlineTagAddr = IRB.CreateOr(TCI.AddrLong, 15);
+  Value *InlineTagAddr = IRB.CreateOr(TCI.PtrLong, 15);
   InlineTagAddr = IRB.CreateIntToPtr(InlineTagAddr, PtrTy);
   Value *InlineTag = IRB.CreateLoad(Int8Ty, InlineTagAddr);
   Value *InlineTagMismatch = IRB.CreateICmpNE(TCI.PtrTag, InlineTag);
@@ -1328,20 +1327,10 @@ Value *HWAddressSanitizer::tagPointer(IRBuilder<> &IRB, Type *Ty,
 
 // Remove tag from an address.
 Value *HWAddressSanitizer::untagPointer(IRBuilder<> &IRB, Value *PtrLong) {
+  unsigned SignExtShift = 64 - PointerTagShift;
   assert(!UsePageAliases);
-  Value *UntaggedPtrLong;
-  if (CompileKernel) {
-    // Kernel addresses have 0xFF in the most significant byte.
-    UntaggedPtrLong =
-        IRB.CreateOr(PtrLong, ConstantInt::get(PtrLong->getType(),
-                                               TagMaskByte << PointerTagShift));
-  } else {
-    // Userspace addresses have 0x00.
-    UntaggedPtrLong = IRB.CreateAnd(
-        PtrLong, ConstantInt::get(PtrLong->getType(),
-                                  ~(TagMaskByte << PointerTagShift)));
-  }
-  return UntaggedPtrLong;
+
+  return IRB.CreateAShr(IRB.CreateShl(PtrLong, SignExtShift), SignExtShift);
 }
 
 Value *HWAddressSanitizer::getHwasanThreadSlotPtr(IRBuilder<> &IRB) {
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll
index bbfb35549b5b61..b525df1ea934e6 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll
@@ -13,48 +13,52 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
-; CHECK-NEXT:    [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 44
-; CHECK-NEXT:    [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP5]]
-; CHECK-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
-; CHECK-NEXT:    store i64 [[TMP6]], ptr [[TMP7]], align 8
-; CHECK-NEXT:    [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
-; CHECK-NEXT:    [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
-; CHECK-NEXT:    [[TMP10:%.*]] = xor i64 [[TMP9]], -1
-; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[TMP0]], 8
-; CHECK-NEXT:    [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
-; CHECK-NEXT:    store i64 [[TMP12]], ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
-; CHECK-NEXT:    [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = ashr i64 [[TMP0]], 3
+; CHECK-NEXT:    [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP5]], 44
+; CHECK-NEXT:    [[TMP7:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP6]]
+; CHECK-NEXT:    [[TMP8:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT:    store i64 [[TMP7]], ptr [[TMP8]], align 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP0]], 56
+; CHECK-NEXT:    [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12
+; CHECK-NEXT:    [[TMP11:%.*]] = xor i64 [[TMP10]], -1
+; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]]
+; CHECK-NEXT:    store i64 [[TMP13]], ptr @__hwasan_tls, align 8
+; CHECK-NEXT:    [[TMP14:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP14]], 1
+; CHECK-NEXT:    [[TMP15:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP5]], 56
 ; CHECK-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; CHECK-NEXT:    [[TMP15:%.*]] = call i8 @__hwasan_generate_tag()
-; CHECK-NEXT:    [[TMP16:%.*]] = zext i8 [[TMP15]] to i64
-; CHECK-NEXT:    [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP18:%.*]] = and i64 [[TMP17]], 72057594037927935
-; CHECK-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP16]], 56
-; CHECK-NEXT:    [[TMP20:%.*]] = or i64 [[TMP18]], [[TMP19]]
-; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr
-; CHECK-NEXT:    [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8
-; CHECK-NEXT:    [[TMP22:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP23:%.*]] = and i64 [[TMP22]], 72057594037927935
-; CHECK-NEXT:    [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
-; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]]
-; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 0
-; CHECK-NEXT:    store i8 4, ptr [[TMP26]], align 1
-; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr i8, ptr [[X]], i32 15
-; CHECK-NEXT:    store i8 [[TMP21]], ptr [[TMP27]], align 1
+; CHECK-NEXT:    [[TMP16:%.*]] = call i8 @__hwasan_generate_tag()
+; CHECK-NEXT:    [[TMP17:%.*]] = zext i8 [[TMP16]] to i64
+; CHECK-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP18]], 8
+; CHECK-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 8
+; CHECK-NEXT:    [[TMP21:%.*]] = shl i64 [[TMP17]], 56
+; CHECK-NEXT:    [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
+; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
+; CHECK-NEXT:    [[TMP23:%.*]] = trunc i64 [[TMP17]] to i8
+; CHECK-NEXT:    [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP25:%.*]] = shl i64 [[TMP24]], 8
+; CHECK-NEXT:    [[TMP26:%.*]] = ashr i64 [[TMP25]], 8
+; CHECK-NEXT:    [[TMP27:%.*]] = ashr i64 [[TMP26]], 4
+; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP27]]
+; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP28]], i32 0
+; CHECK-NEXT:    store i8 4, ptr [[TMP29]], align 1
+; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[X]], i32 15
+; CHECK-NEXT:    store i8 [[TMP23]], ptr [[TMP30]], align 1
 ; CHECK-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]])
-; CHECK-NEXT:    [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935
-; CHECK-NEXT:    [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
-; CHECK-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP31]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP31:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP32:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP33:%.*]] = shl i64 [[TMP32]], 8
+; CHECK-NEXT:    [[TMP34:%.*]] = ashr i64 [[TMP33]], 8
+; CHECK-NEXT:    [[TMP35:%.*]] = ashr i64 [[TMP34]], 4
+; CHECK-NEXT:    [[TMP36:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP35]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP31]], i64 1, i1 false)
 ; CHECK-NEXT:    ret void
 ;
 
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
index edbcdbeb8516cd..ec6b7b2e895d18 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
@@ -45,26 +45,29 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
 ; DYNAMIC-SHADOW-NEXT:      #dbg_value(!DIArgList(ptr [[X]], ptr [[X]]), [[META11:![0-9]+]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref), [[META13:![0-9]+]])
 ; DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG14:![0-9]+]]
 ; DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]], !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 8, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = ashr i64 [[TMP5]], 8, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]], !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP11:%.*]] = shl i64 [[TMP10]], 8, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP11]], 8, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = ashr i64 [[TMP12]], 4, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP13]], !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = getelementptr i8, ptr [[TMP14]], i32 0, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    store i8 4, ptr [[TMP15]], align 1, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    store i8 [[TMP9]], ptr [[TMP16]], align 1, !dbg [[DBG14]]
 ; DYNAMIC-SHADOW-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG15:![0-9]+]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG15]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG15]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG15]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP18]], !dbg [[DBG15]]
-; DYNAMIC-SHADOW-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG15:![0-9]+]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP18]], 8, !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 8, !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = ashr i64 [[TMP20]], 4, !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP22:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP21]], !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP22]], i8 [[TMP17]], i64 1, i1 false), !dbg [[DBG15]]
 ; DYNAMIC-SHADOW-NEXT:    ret void, !dbg [[DBG15]]
 ;
 ; ZERO-BASED-SHADOW-LABEL: define void @test_alloca
@@ -80,26 +83,29 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
 ; ZERO-BASED-SHADOW-NEXT:      #dbg_value(!DIArgList(ptr [[X]], ptr [[X]]), [[META11:![0-9]+]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref), [[META13:![0-9]+]])
 ; ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG14:![0-9]+]]
 ; ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 8, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = ashr i64 [[TMP5]], 8, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]], !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP11:%.*]] = shl i64 [[TMP10]], 8, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP11]], 8, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = ashr i64 [[TMP12]], 4, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = getelementptr i8, ptr [[TMP14]], i32 0, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    store i8 4, ptr [[TMP15]], align 1, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    store i8 [[TMP9]], ptr [[TMP16]], align 1, !dbg [[DBG14]]
 ; ZERO-BASED-SHADOW-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG15:![0-9]+]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG15]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG15]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG15]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr, !dbg [[DBG15]]
-; ZERO-BASED-SHADOW-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG15:![0-9]+]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP18]], 8, !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 8, !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = ashr i64 [[TMP20]], 4, !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr, !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP22]], i8 [[TMP17]], i64 1, i1 false), !dbg [[DBG15]]
 ; ZERO-BASED-SHADOW-NEXT:    ret void, !dbg [[DBG15]]
 ;
 entry:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/atomic.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/atomic.ll
index 152d1bfd3288d1..3c06fb850612c4 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/atomic.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/atomic.ll
@@ -11,12 +11,13 @@ define void @atomicrmw(ptr %ptr) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[PTR:%.*]]) #[[ATTR0:[0-9]+]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[PTR]], i32 19)
-; CHECK-NEXT:    [[TMP4:%.*]] = atomicrmw add ptr [[PTR]], i64 1 seq_cst, align 8
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[PTR]], i32 19)
+; CHECK-NEXT:    [[TMP5:%.*]] = atomicrmw add ptr [[PTR]], i64 1 seq_cst, align 8
 ; CHECK-NEXT:    ret void
 ;
 
@@ -30,12 +31,13 @@ define void @cmpxchg(ptr %ptr, i64 %compare_to, i64 %new_value) sanitize_hwaddre
 ; CHECK-SAME: (ptr [[PTR:%.*]], i64 [[COMPARE_TO:%.*]], i64 [[NEW_VALUE:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[PTR]], i32 19)
-; CHECK-NEXT:    [[TMP4:%.*]] = cmpxchg ptr [[PTR]], i64 [[COMPARE_TO]], i64 [[NEW_VALUE]] seq_cst seq_cst, align 8
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[PTR]], i32 19)
+; CHECK-NEXT:    [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i64 [[COMPARE_TO]], i64 [[NEW_VALUE]] seq_cst seq_cst, align 8
 ; CHECK-NEXT:    ret void
 ;
 
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
index e0eb1115854aba..3b00ba9c1f2bfe 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
@@ -18,23 +18,25 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; CHECK-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; CHECK-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; CHECK-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; CHECK-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; CHECK-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2:![0-9]+]]
-; CHECK:       12:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 0)
-; CHECK-NEXT:    br label [[TMP13]]
-; CHECK:       13:
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; CHECK-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; CHECK-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2:![0-9]+]]
+; CHECK:       14:
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 0)
+; CHECK-NEXT:    br label [[TMP15]]
+; CHECK:       15:
 ; CHECK-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; CHECK-NEXT:    ret i8 [[B]]
 ;
@@ -42,11 +44,12 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 0)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 0)
 ; NOFASTPATH-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; NOFASTPATH-NEXT:    ret i8 [[B]]
 ;
@@ -54,23 +57,25 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; FASTPATH-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; FASTPATH-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; FASTPATH-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; FASTPATH-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; FASTPATH-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; FASTPATH-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2:![0-9]+]]
-; FASTPATH:       12:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 0)
-; FASTPATH-NEXT:    br label [[TMP13]]
-; FASTPATH:       13:
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; FASTPATH-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; FASTPATH-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; FASTPATH-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; FASTPATH-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; FASTPATH-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; FASTPATH-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; FASTPATH-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; FASTPATH-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2:![0-9]+]]
+; FASTPATH:       14:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 0)
+; FASTPATH-NEXT:    br label [[TMP15]]
+; FASTPATH:       15:
 ; FASTPATH-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret i8 [[B]]
 ;
@@ -81,16 +86,17 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2:![0-9]+]]
-; ABORT-DYNAMIC-SHADOW:       8:
-; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 0)
-; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2:![0-9]+]]
 ; ABORT-DYNAMIC-SHADOW:       9:
+; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 0)
+; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-DYNAMIC-SHADOW:       10:
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; ABORT-DYNAMIC-SHADOW-NEXT:    ret i8 [[B]]
 ;
@@ -101,33 +107,34 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2:![0-9]+]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 96", "{x10}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2:![0-9]+]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 0
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 96", "{x10}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 0
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret i8 [[B]]
 ;
@@ -138,16 +145,17 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2:![0-9]+]]
-; ABORT-ZERO-BASED-SHADOW:       8:
-; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 0)
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2:![0-9]+]]
 ; ABORT-ZERO-BASED-SHADOW:       9:
+; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 0)
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-ZERO-BASED-SHADOW:       10:
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    ret i8 [[B]]
 ;
@@ -158,33 +166,34 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2:![0-9]+]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 96", "{x10}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2:![0-9]+]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 0
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 96", "{x10}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 0
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret i8 [[B]]
 ;
@@ -198,23 +207,25 @@ define i16 @test_load16(ptr %a) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; CHECK-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; CHECK-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; CHECK-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; CHECK-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; CHECK-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; CHECK:       12:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 1)
-; CHECK-NEXT:    br label [[TMP13]]
-; CHECK:       13:
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; CHECK-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; CHECK-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; CHECK:       14:
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 1)
+; CHECK-NEXT:    br label [[TMP15]]
+; CHECK:       15:
 ; CHECK-NEXT:    [[B:%.*]] = load i16, ptr [[A]], align 4
 ; CHECK-NEXT:    ret i16 [[B]]
 ;
@@ -222,11 +233,12 @@ define i16 @test_load16(ptr %a) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 1)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 1)
 ; NOFASTPATH-NEXT:    [[B:%.*]] = load i16, ptr [[A]], align 4
 ; NOFASTPATH-NEXT:    ret i16 [[B]]
 ;
@@ -234,23 +246,25 @@ define i16 @test_load16(ptr %a) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; FASTPATH-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; FASTPATH-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; FASTPATH-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; FASTPATH-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; FASTPATH-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; FASTPATH-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; FASTPATH:       12:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 1)
-; FASTPATH-NEXT:    br label [[TMP13]]
-; FASTPATH:       13:
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; FASTPATH-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; FASTPATH-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; FASTPATH-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; FASTPATH-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; FASTPATH-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; FASTPATH-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; FASTPATH-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; FASTPATH-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; FASTPATH:       14:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 1)
+; FASTPATH-NEXT:    br label [[TMP15]]
+; FASTPATH:       15:
 ; FASTPATH-NEXT:    [[B:%.*]] = load i16, ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret i16 [[B]]
 ;
@@ -261,16 +275,17 @@ define i16 @test_load16(ptr %a) sanitize_hwaddress {
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-DYNAMIC-SHADOW:       8:
-; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 1)
-; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-DYNAMIC-SHADOW:       9:
+; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 1)
+; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-DYNAMIC-SHADOW:       10:
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i16, ptr [[A]], align 4
 ; ABORT-DYNAMIC-SHADOW-NEXT:    ret i16 [[B]]
 ;
@@ -281,33 +296,34 @@ define i16 @test_load16(ptr %a) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 97", "{x10}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 97", "{x10}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i16, ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret i16 [[B]]
 ;
@@ -318,16 +334,17 @@ define i16 @test_load16(ptr %a) sanitize_hwaddress {
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-ZERO-BASED-SHADOW:       8:
-; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 1)
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-ZERO-BASED-SHADOW:       9:
+; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 1)
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-ZERO-BASED-SHADOW:       10:
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i16, ptr [[A]], align 4
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    ret i16 [[B]]
 ;
@@ -338,33 +355,34 @@ define i16 @test_load16(ptr %a) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 97", "{x10}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 97", "{x10}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i16, ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret i16 [[B]]
 ;
@@ -378,23 +396,25 @@ define i32 @test_load32(ptr %a) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; CHECK-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; CHECK-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; CHECK-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; CHECK-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; CHECK-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; CHECK:       12:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 2)
-; CHECK-NEXT:    br label [[TMP13]]
-; CHECK:       13:
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; CHECK-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; CHECK-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; CHECK:       14:
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 2)
+; CHECK-NEXT:    br label [[TMP15]]
+; CHECK:       15:
 ; CHECK-NEXT:    [[B:%.*]] = load i32, ptr [[A]], align 4
 ; CHECK-NEXT:    ret i32 [[B]]
 ;
@@ -402,11 +422,12 @@ define i32 @test_load32(ptr %a) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 2)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 2)
 ; NOFASTPATH-NEXT:    [[B:%.*]] = load i32, ptr [[A]], align 4
 ; NOFASTPATH-NEXT:    ret i32 [[B]]
 ;
@@ -414,23 +435,25 @@ define i32 @test_load32(ptr %a) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; FASTPATH-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; FASTPATH-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; FASTPATH-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; FASTPATH-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; FASTPATH-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; FASTPATH-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; FASTPATH:       12:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 2)
-; FASTPATH-NEXT:    br label [[TMP13]]
-; FASTPATH:       13:
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; FASTPATH-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; FASTPATH-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; FASTPATH-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; FASTPATH-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; FASTPATH-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; FASTPATH-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; FASTPATH-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; FASTPATH-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; FASTPATH:       14:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 2)
+; FASTPATH-NEXT:    br label [[TMP15]]
+; FASTPATH:       15:
 ; FASTPATH-NEXT:    [[B:%.*]] = load i32, ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret i32 [[B]]
 ;
@@ -441,16 +464,17 @@ define i32 @test_load32(ptr %a) sanitize_hwaddress {
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-DYNAMIC-SHADOW:       8:
-; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2)
-; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-DYNAMIC-SHADOW:       9:
+; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2)
+; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-DYNAMIC-SHADOW:       10:
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i32, ptr [[A]], align 4
 ; ABORT-DYNAMIC-SHADOW-NEXT:    ret i32 [[B]]
 ;
@@ -461,33 +485,34 @@ define i32 @test_load32(ptr %a) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 98", "{x10}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 3
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 98", "{x10}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 3
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i32, ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret i32 [[B]]
 ;
@@ -498,16 +523,17 @@ define i32 @test_load32(ptr %a) sanitize_hwaddress {
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-ZERO-BASED-SHADOW:       8:
-; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2)
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-ZERO-BASED-SHADOW:       9:
+; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2)
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-ZERO-BASED-SHADOW:       10:
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i32, ptr [[A]], align 4
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    ret i32 [[B]]
 ;
@@ -518,33 +544,34 @@ define i32 @test_load32(ptr %a) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 98", "{x10}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 3
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 98", "{x10}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 3
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i32, ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret i32 [[B]]
 ;
@@ -558,23 +585,25 @@ define i64 @test_load64(ptr %a) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; CHECK-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; CHECK-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; CHECK-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; CHECK-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; CHECK-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; CHECK:       12:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 3)
-; CHECK-NEXT:    br label [[TMP13]]
-; CHECK:       13:
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; CHECK-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; CHECK-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; CHECK:       14:
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 3)
+; CHECK-NEXT:    br label [[TMP15]]
+; CHECK:       15:
 ; CHECK-NEXT:    [[B:%.*]] = load i64, ptr [[A]], align 8
 ; CHECK-NEXT:    ret i64 [[B]]
 ;
@@ -582,11 +611,12 @@ define i64 @test_load64(ptr %a) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 3)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 3)
 ; NOFASTPATH-NEXT:    [[B:%.*]] = load i64, ptr [[A]], align 8
 ; NOFASTPATH-NEXT:    ret i64 [[B]]
 ;
@@ -594,23 +624,25 @@ define i64 @test_load64(ptr %a) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; FASTPATH-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; FASTPATH-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; FASTPATH-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; FASTPATH-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; FASTPATH-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; FASTPATH-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; FASTPATH:       12:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 3)
-; FASTPATH-NEXT:    br label [[TMP13]]
-; FASTPATH:       13:
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; FASTPATH-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; FASTPATH-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; FASTPATH-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; FASTPATH-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; FASTPATH-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; FASTPATH-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; FASTPATH-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; FASTPATH-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; FASTPATH:       14:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 3)
+; FASTPATH-NEXT:    br label [[TMP15]]
+; FASTPATH:       15:
 ; FASTPATH-NEXT:    [[B:%.*]] = load i64, ptr [[A]], align 8
 ; FASTPATH-NEXT:    ret i64 [[B]]
 ;
@@ -621,16 +653,17 @@ define i64 @test_load64(ptr %a) sanitize_hwaddress {
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-DYNAMIC-SHADOW:       8:
-; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 3)
-; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-DYNAMIC-SHADOW:       9:
+; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 3)
+; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-DYNAMIC-SHADOW:       10:
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i64, ptr [[A]], align 8
 ; ABORT-DYNAMIC-SHADOW-NEXT:    ret i64 [[B]]
 ;
@@ -641,33 +674,34 @@ define i64 @test_load64(ptr %a) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 99", "{x10}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 7
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 99", "{x10}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 7
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i64, ptr [[A]], align 8
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret i64 [[B]]
 ;
@@ -678,16 +712,17 @@ define i64 @test_load64(ptr %a) sanitize_hwaddress {
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-ZERO-BASED-SHADOW:       8:
-; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 3)
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-ZERO-BASED-SHADOW:       9:
+; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 3)
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-ZERO-BASED-SHADOW:       10:
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i64, ptr [[A]], align 8
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    ret i64 [[B]]
 ;
@@ -698,33 +733,34 @@ define i64 @test_load64(ptr %a) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 99", "{x10}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 7
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 99", "{x10}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 7
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i64, ptr [[A]], align 8
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret i64 [[B]]
 ;
@@ -738,23 +774,25 @@ define i128 @test_load128(ptr %a) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; CHECK-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; CHECK-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; CHECK-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; CHECK-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; CHECK-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; CHECK:       12:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 4)
-; CHECK-NEXT:    br label [[TMP13]]
-; CHECK:       13:
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; CHECK-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; CHECK-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; CHECK:       14:
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 4)
+; CHECK-NEXT:    br label [[TMP15]]
+; CHECK:       15:
 ; CHECK-NEXT:    [[B:%.*]] = load i128, ptr [[A]], align 16
 ; CHECK-NEXT:    ret i128 [[B]]
 ;
@@ -762,11 +800,12 @@ define i128 @test_load128(ptr %a) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 4)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 4)
 ; NOFASTPATH-NEXT:    [[B:%.*]] = load i128, ptr [[A]], align 16
 ; NOFASTPATH-NEXT:    ret i128 [[B]]
 ;
@@ -774,23 +813,25 @@ define i128 @test_load128(ptr %a) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; FASTPATH-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; FASTPATH-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; FASTPATH-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; FASTPATH-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; FASTPATH-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; FASTPATH-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; FASTPATH:       12:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 4)
-; FASTPATH-NEXT:    br label [[TMP13]]
-; FASTPATH:       13:
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; FASTPATH-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; FASTPATH-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; FASTPATH-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; FASTPATH-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; FASTPATH-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; FASTPATH-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; FASTPATH-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; FASTPATH-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; FASTPATH:       14:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 4)
+; FASTPATH-NEXT:    br label [[TMP15]]
+; FASTPATH:       15:
 ; FASTPATH-NEXT:    [[B:%.*]] = load i128, ptr [[A]], align 16
 ; FASTPATH-NEXT:    ret i128 [[B]]
 ;
@@ -801,16 +842,17 @@ define i128 @test_load128(ptr %a) sanitize_hwaddress {
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-DYNAMIC-SHADOW:       8:
-; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 4)
-; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-DYNAMIC-SHADOW:       9:
+; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 4)
+; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-DYNAMIC-SHADOW:       10:
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i128, ptr [[A]], align 16
 ; ABORT-DYNAMIC-SHADOW-NEXT:    ret i128 [[B]]
 ;
@@ -821,33 +863,34 @@ define i128 @test_load128(ptr %a) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 100", "{x10}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 100", "{x10}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i128, ptr [[A]], align 16
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret i128 [[B]]
 ;
@@ -858,16 +901,17 @@ define i128 @test_load128(ptr %a) sanitize_hwaddress {
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-ZERO-BASED-SHADOW:       8:
-; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 4)
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-ZERO-BASED-SHADOW:       9:
+; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 4)
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-ZERO-BASED-SHADOW:       10:
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i128, ptr [[A]], align 16
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    ret i128 [[B]]
 ;
@@ -878,33 +922,34 @@ define i128 @test_load128(ptr %a) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 100", "{x10}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 100", "{x10}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i128, ptr [[A]], align 16
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret i128 [[B]]
 ;
@@ -918,12 +963,13 @@ define i40 @test_load40(ptr %a) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    call void @__hwasan_loadN(i64 [[TMP4]], i64 5)
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    call void @__hwasan_loadN(i64 [[TMP5]], i64 5)
 ; CHECK-NEXT:    [[B:%.*]] = load i40, ptr [[A]], align 4
 ; CHECK-NEXT:    ret i40 [[B]]
 ;
@@ -931,12 +977,13 @@ define i40 @test_load40(ptr %a) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; NOFASTPATH-NEXT:    call void @__hwasan_loadN(i64 [[TMP4]], i64 5)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; NOFASTPATH-NEXT:    call void @__hwasan_loadN(i64 [[TMP5]], i64 5)
 ; NOFASTPATH-NEXT:    [[B:%.*]] = load i40, ptr [[A]], align 4
 ; NOFASTPATH-NEXT:    ret i40 [[B]]
 ;
@@ -944,12 +991,13 @@ define i40 @test_load40(ptr %a) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    call void @__hwasan_loadN(i64 [[TMP4]], i64 5)
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    call void @__hwasan_loadN(i64 [[TMP5]], i64 5)
 ; FASTPATH-NEXT:    [[B:%.*]] = load i40, ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret i40 [[B]]
 ;
@@ -999,23 +1047,25 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; CHECK-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; CHECK-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; CHECK-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; CHECK-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; CHECK-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; CHECK:       12:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 16)
-; CHECK-NEXT:    br label [[TMP13]]
-; CHECK:       13:
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; CHECK-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; CHECK-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; CHECK:       14:
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 16)
+; CHECK-NEXT:    br label [[TMP15]]
+; CHECK:       15:
 ; CHECK-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; CHECK-NEXT:    ret void
 ;
@@ -1023,11 +1073,12 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 16)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 16)
 ; NOFASTPATH-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; NOFASTPATH-NEXT:    ret void
 ;
@@ -1035,23 +1086,25 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; FASTPATH-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; FASTPATH-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; FASTPATH-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; FASTPATH-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; FASTPATH-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; FASTPATH-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; FASTPATH:       12:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 16)
-; FASTPATH-NEXT:    br label [[TMP13]]
-; FASTPATH:       13:
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; FASTPATH-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; FASTPATH-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; FASTPATH-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; FASTPATH-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; FASTPATH-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; FASTPATH-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; FASTPATH-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; FASTPATH-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; FASTPATH:       14:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 16)
+; FASTPATH-NEXT:    br label [[TMP15]]
+; FASTPATH:       15:
 ; FASTPATH-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret void
 ;
@@ -1062,16 +1115,17 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-DYNAMIC-SHADOW:       8:
-; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 16)
-; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-DYNAMIC-SHADOW:       9:
+; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 16)
+; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-DYNAMIC-SHADOW:       10:
 ; ABORT-DYNAMIC-SHADOW-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; ABORT-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1082,33 +1136,34 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 112", "{x10}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 0
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 112", "{x10}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 0
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1119,16 +1174,17 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-ZERO-BASED-SHADOW:       8:
-; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 16)
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-ZERO-BASED-SHADOW:       9:
+; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 16)
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-ZERO-BASED-SHADOW:       10:
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1139,33 +1195,34 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 112", "{x10}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 0
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 112", "{x10}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 0
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1179,23 +1236,25 @@ define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; CHECK-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; CHECK-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; CHECK-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; CHECK-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; CHECK-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; CHECK:       12:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 17)
-; CHECK-NEXT:    br label [[TMP13]]
-; CHECK:       13:
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; CHECK-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; CHECK-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; CHECK:       14:
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 17)
+; CHECK-NEXT:    br label [[TMP15]]
+; CHECK:       15:
 ; CHECK-NEXT:    store i16 [[B]], ptr [[A]], align 4
 ; CHECK-NEXT:    ret void
 ;
@@ -1203,11 +1262,12 @@ define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 17)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 17)
 ; NOFASTPATH-NEXT:    store i16 [[B]], ptr [[A]], align 4
 ; NOFASTPATH-NEXT:    ret void
 ;
@@ -1215,23 +1275,25 @@ define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]], i16 [[B:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; FASTPATH-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; FASTPATH-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; FASTPATH-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; FASTPATH-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; FASTPATH-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; FASTPATH-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; FASTPATH:       12:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 17)
-; FASTPATH-NEXT:    br label [[TMP13]]
-; FASTPATH:       13:
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; FASTPATH-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; FASTPATH-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; FASTPATH-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; FASTPATH-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; FASTPATH-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; FASTPATH-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; FASTPATH-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; FASTPATH-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; FASTPATH:       14:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 17)
+; FASTPATH-NEXT:    br label [[TMP15]]
+; FASTPATH:       15:
 ; FASTPATH-NEXT:    store i16 [[B]], ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret void
 ;
@@ -1242,16 +1304,17 @@ define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-DYNAMIC-SHADOW:       8:
-; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 17)
-; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-DYNAMIC-SHADOW:       9:
+; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 17)
+; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-DYNAMIC-SHADOW:       10:
 ; ABORT-DYNAMIC-SHADOW-NEXT:    store i16 [[B]], ptr [[A]], align 4
 ; ABORT-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1262,33 +1325,34 @@ define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 113", "{x10}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 113", "{x10}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    store i16 [[B]], ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1299,16 +1363,17 @@ define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-ZERO-BASED-SHADOW:       8:
-; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 17)
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-ZERO-BASED-SHADOW:       9:
+; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 17)
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-ZERO-BASED-SHADOW:       10:
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    store i16 [[B]], ptr [[A]], align 4
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1319,33 +1384,34 @@ define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 113", "{x10}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 113", "{x10}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    store i16 [[B]], ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1359,23 +1425,25 @@ define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; CHECK-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; CHECK-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; CHECK-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; CHECK-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; CHECK-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; CHECK:       12:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 18)
-; CHECK-NEXT:    br label [[TMP13]]
-; CHECK:       13:
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; CHECK-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; CHECK-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; CHECK:       14:
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 18)
+; CHECK-NEXT:    br label [[TMP15]]
+; CHECK:       15:
 ; CHECK-NEXT:    store i32 [[B]], ptr [[A]], align 4
 ; CHECK-NEXT:    ret void
 ;
@@ -1383,11 +1451,12 @@ define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 18)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 18)
 ; NOFASTPATH-NEXT:    store i32 [[B]], ptr [[A]], align 4
 ; NOFASTPATH-NEXT:    ret void
 ;
@@ -1395,23 +1464,25 @@ define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; FASTPATH-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; FASTPATH-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; FASTPATH-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; FASTPATH-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; FASTPATH-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; FASTPATH-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; FASTPATH:       12:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 18)
-; FASTPATH-NEXT:    br label [[TMP13]]
-; FASTPATH:       13:
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; FASTPATH-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; FASTPATH-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; FASTPATH-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; FASTPATH-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; FASTPATH-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; FASTPATH-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; FASTPATH-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; FASTPATH-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; FASTPATH:       14:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 18)
+; FASTPATH-NEXT:    br label [[TMP15]]
+; FASTPATH:       15:
 ; FASTPATH-NEXT:    store i32 [[B]], ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret void
 ;
@@ -1422,16 +1493,17 @@ define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-DYNAMIC-SHADOW:       8:
-; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 18)
-; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-DYNAMIC-SHADOW:       9:
+; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 18)
+; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-DYNAMIC-SHADOW:       10:
 ; ABORT-DYNAMIC-SHADOW-NEXT:    store i32 [[B]], ptr [[A]], align 4
 ; ABORT-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1442,33 +1514,34 @@ define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 114", "{x10}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 3
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 114", "{x10}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 3
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    store i32 [[B]], ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1479,16 +1552,17 @@ define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-ZERO-BASED-SHADOW:       8:
-; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 18)
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-ZERO-BASED-SHADOW:       9:
+; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 18)
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-ZERO-BASED-SHADOW:       10:
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    store i32 [[B]], ptr [[A]], align 4
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1499,33 +1573,34 @@ define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 114", "{x10}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 3
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 114", "{x10}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 3
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    store i32 [[B]], ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1539,23 +1614,25 @@ define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; CHECK-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; CHECK-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; CHECK-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; CHECK-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; CHECK-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; CHECK:       12:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 19)
-; CHECK-NEXT:    br label [[TMP13]]
-; CHECK:       13:
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; CHECK-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; CHECK-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; CHECK:       14:
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 19)
+; CHECK-NEXT:    br label [[TMP15]]
+; CHECK:       15:
 ; CHECK-NEXT:    store i64 [[B]], ptr [[A]], align 8
 ; CHECK-NEXT:    ret void
 ;
@@ -1563,11 +1640,12 @@ define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 19)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 19)
 ; NOFASTPATH-NEXT:    store i64 [[B]], ptr [[A]], align 8
 ; NOFASTPATH-NEXT:    ret void
 ;
@@ -1575,23 +1653,25 @@ define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; FASTPATH-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; FASTPATH-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; FASTPATH-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; FASTPATH-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; FASTPATH-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; FASTPATH-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; FASTPATH:       12:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 19)
-; FASTPATH-NEXT:    br label [[TMP13]]
-; FASTPATH:       13:
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; FASTPATH-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; FASTPATH-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; FASTPATH-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; FASTPATH-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; FASTPATH-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; FASTPATH-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; FASTPATH-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; FASTPATH-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; FASTPATH:       14:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 19)
+; FASTPATH-NEXT:    br label [[TMP15]]
+; FASTPATH:       15:
 ; FASTPATH-NEXT:    store i64 [[B]], ptr [[A]], align 8
 ; FASTPATH-NEXT:    ret void
 ;
@@ -1602,16 +1682,17 @@ define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-DYNAMIC-SHADOW:       8:
-; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 19)
-; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-DYNAMIC-SHADOW:       9:
+; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 19)
+; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-DYNAMIC-SHADOW:       10:
 ; ABORT-DYNAMIC-SHADOW-NEXT:    store i64 [[B]], ptr [[A]], align 8
 ; ABORT-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1622,33 +1703,34 @@ define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 115", "{x10}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 7
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 115", "{x10}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 7
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    store i64 [[B]], ptr [[A]], align 8
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1659,16 +1741,17 @@ define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-ZERO-BASED-SHADOW:       8:
-; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 19)
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-ZERO-BASED-SHADOW:       9:
+; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 19)
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-ZERO-BASED-SHADOW:       10:
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    store i64 [[B]], ptr [[A]], align 8
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1679,33 +1762,34 @@ define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 115", "{x10}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 7
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 115", "{x10}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 7
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    store i64 [[B]], ptr [[A]], align 8
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1719,23 +1803,25 @@ define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]], i128 [[B:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; CHECK-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; CHECK-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; CHECK-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; CHECK-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; CHECK-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; CHECK:       12:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 20)
-; CHECK-NEXT:    br label [[TMP13]]
-; CHECK:       13:
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; CHECK-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; CHECK-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; CHECK:       14:
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 20)
+; CHECK-NEXT:    br label [[TMP15]]
+; CHECK:       15:
 ; CHECK-NEXT:    store i128 [[B]], ptr [[A]], align 16
 ; CHECK-NEXT:    ret void
 ;
@@ -1743,11 +1829,12 @@ define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]], i128 [[B:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 20)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 20)
 ; NOFASTPATH-NEXT:    store i128 [[B]], ptr [[A]], align 16
 ; NOFASTPATH-NEXT:    ret void
 ;
@@ -1755,23 +1842,25 @@ define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]], i128 [[B:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 56
-; FASTPATH-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; FASTPATH-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; FASTPATH-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; FASTPATH-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; FASTPATH-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; FASTPATH-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]], !prof [[PROF2]]
-; FASTPATH:       12:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[A]], i32 20)
-; FASTPATH-NEXT:    br label [[TMP13]]
-; FASTPATH:       13:
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 56
+; FASTPATH-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; FASTPATH-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 8
+; FASTPATH-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; FASTPATH-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; FASTPATH-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; FASTPATH-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; FASTPATH-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; FASTPATH-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
+; FASTPATH:       14:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP4]], ptr [[A]], i32 20)
+; FASTPATH-NEXT:    br label [[TMP15]]
+; FASTPATH:       15:
 ; FASTPATH-NEXT:    store i128 [[B]], ptr [[A]], align 16
 ; FASTPATH-NEXT:    ret void
 ;
@@ -1782,16 +1871,17 @@ define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-DYNAMIC-SHADOW:       8:
-; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 20)
-; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-DYNAMIC-SHADOW:       9:
+; ABORT-DYNAMIC-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 20)
+; ABORT-DYNAMIC-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-DYNAMIC-SHADOW:       10:
 ; ABORT-DYNAMIC-SHADOW-NEXT:    store i128 [[B]], ptr [[A]], align 16
 ; ABORT-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1802,33 +1892,34 @@ define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 116", "{x10}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 116", "{x10}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    store i128 [[B]], ptr [[A]], align 16
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1839,16 +1930,17 @@ define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; ABORT-ZERO-BASED-SHADOW:       8:
-; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 20)
-; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP9]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; ABORT-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; ABORT-ZERO-BASED-SHADOW:       9:
+; ABORT-ZERO-BASED-SHADOW-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 20)
+; ABORT-ZERO-BASED-SHADOW-NEXT:    br label [[TMP10]]
+; ABORT-ZERO-BASED-SHADOW:       10:
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    store i128 [[B]], ptr [[A]], align 16
 ; ABORT-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1859,33 +1951,34 @@ define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 116", "{x10}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "ebreak\0Aaddiw x0, x11, 116", "{x10}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    store i128 [[B]], ptr [[A]], align 16
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1899,12 +1992,13 @@ define void @test_store40(ptr %a, i40 %b) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]], i40 [[B:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    call void @__hwasan_storeN(i64 [[TMP4]], i64 5)
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    call void @__hwasan_storeN(i64 [[TMP5]], i64 5)
 ; CHECK-NEXT:    store i40 [[B]], ptr [[A]], align 4
 ; CHECK-NEXT:    ret void
 ;
@@ -1912,12 +2006,13 @@ define void @test_store40(ptr %a, i40 %b) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]], i40 [[B:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; NOFASTPATH-NEXT:    call void @__hwasan_storeN(i64 [[TMP4]], i64 5)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; NOFASTPATH-NEXT:    call void @__hwasan_storeN(i64 [[TMP5]], i64 5)
 ; NOFASTPATH-NEXT:    store i40 [[B]], ptr [[A]], align 4
 ; NOFASTPATH-NEXT:    ret void
 ;
@@ -1925,12 +2020,13 @@ define void @test_store40(ptr %a, i40 %b) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]], i40 [[B:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    call void @__hwasan_storeN(i64 [[TMP4]], i64 5)
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    call void @__hwasan_storeN(i64 [[TMP5]], i64 5)
 ; FASTPATH-NEXT:    store i40 [[B]], ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret void
 ;
@@ -1980,12 +2076,13 @@ define void @test_store_unaligned(ptr %a, i64 %b) sanitize_hwaddress {
 ; CHECK-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; CHECK-NEXT:    call void @__hwasan_storeN(i64 [[TMP4]], i64 8)
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; CHECK-NEXT:    call void @__hwasan_storeN(i64 [[TMP5]], i64 8)
 ; CHECK-NEXT:    store i64 [[B]], ptr [[A]], align 4
 ; CHECK-NEXT:    ret void
 ;
@@ -1993,12 +2090,13 @@ define void @test_store_unaligned(ptr %a, i64 %b) sanitize_hwaddress {
 ; NOFASTPATH-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
 ; NOFASTPATH-NEXT:  entry:
 ; NOFASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; NOFASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; NOFASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; NOFASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; NOFASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; NOFASTPATH-NEXT:    call void @__hwasan_storeN(i64 [[TMP4]], i64 8)
+; NOFASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; NOFASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; NOFASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; NOFASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; NOFASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; NOFASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; NOFASTPATH-NEXT:    call void @__hwasan_storeN(i64 [[TMP5]], i64 8)
 ; NOFASTPATH-NEXT:    store i64 [[B]], ptr [[A]], align 4
 ; NOFASTPATH-NEXT:    ret void
 ;
@@ -2006,12 +2104,13 @@ define void @test_store_unaligned(ptr %a, i64 %b) sanitize_hwaddress {
 ; FASTPATH-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
 ; FASTPATH-NEXT:  entry:
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FASTPATH-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; FASTPATH-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; FASTPATH-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; FASTPATH-NEXT:    call void @__hwasan_storeN(i64 [[TMP4]], i64 8)
+; FASTPATH-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; FASTPATH-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; FASTPATH-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; FASTPATH-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; FASTPATH-NEXT:    call void @__hwasan_storeN(i64 [[TMP5]], i64 8)
 ; FASTPATH-NEXT:    store i64 [[B]], ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret void
 ;
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll
index dda9a70a7cecaf..022ff5f9ab01b6 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll
@@ -19,76 +19,81 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
 ; CHECK-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk.__gxx_personality_v0 {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
-; CHECK-NEXT:    [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 44
-; CHECK-NEXT:    [[TMP6:%.*]] = or i64 ptrtoint (ptr @test to i64), [[TMP5]]
-; CHECK-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
-; CHECK-NEXT:    store i64 [[TMP6]], ptr [[TMP7]], align 8
-; CHECK-NEXT:    [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
-; CHECK-NEXT:    [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
-; CHECK-NEXT:    [[TMP10:%.*]] = xor i64 [[TMP9]], -1
-; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[TMP0]], 8
-; CHECK-NEXT:    [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
-; CHECK-NEXT:    store i64 [[TMP12]], ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
-; CHECK-NEXT:    [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = ashr i64 [[TMP0]], 3
+; CHECK-NEXT:    [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP5]], 44
+; CHECK-NEXT:    [[TMP7:%.*]] = or i64 ptrtoint (ptr @test to i64), [[TMP6]]
+; CHECK-NEXT:    [[TMP8:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT:    store i64 [[TMP7]], ptr [[TMP8]], align 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP0]], 56
+; CHECK-NEXT:    [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12
+; CHECK-NEXT:    [[TMP11:%.*]] = xor i64 [[TMP10]], -1
+; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]]
+; CHECK-NEXT:    store i64 [[TMP13]], ptr @__hwasan_tls, align 8
+; CHECK-NEXT:    [[TMP14:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP14]], 1
+; CHECK-NEXT:    [[TMP15:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP5]], 56
 ; CHECK-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; CHECK-NEXT:    [[TMP15:%.*]] = xor i64 [[TMP2]], 0
-; CHECK-NEXT:    [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935
-; CHECK-NEXT:    [[TMP18:%.*]] = shl i64 [[TMP15]], 56
-; CHECK-NEXT:    [[TMP19:%.*]] = or i64 [[TMP17]], [[TMP18]]
-; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr
+; CHECK-NEXT:    [[TMP16:%.*]] = xor i64 [[TMP3]], 0
+; CHECK-NEXT:    [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP18:%.*]] = shl i64 [[TMP17]], 8
+; CHECK-NEXT:    [[TMP19:%.*]] = ashr i64 [[TMP18]], 8
+; CHECK-NEXT:    [[TMP20:%.*]] = shl i64 [[TMP16]], 56
+; CHECK-NEXT:    [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]
+; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
 ; CHECK-NEXT:    [[EXN_SLOT:%.*]] = alloca ptr, align 8
 ; CHECK-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
 ; CHECK-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr [[X]])
-; CHECK-NEXT:    [[TMP20:%.*]] = trunc i64 [[TMP15]] to i8
-; CHECK-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; CHECK-NEXT:    [[TMP23:%.*]] = lshr i64 [[TMP22]], 4
-; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP23]]
-; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr i8, ptr [[TMP24]], i32 0
-; CHECK-NEXT:    store i8 4, ptr [[TMP25]], align 1
-; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[X]], i32 15
-; CHECK-NEXT:    store i8 [[TMP20]], ptr [[TMP26]], align 1
+; CHECK-NEXT:    [[TMP22:%.*]] = trunc i64 [[TMP16]] to i8
+; CHECK-NEXT:    [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP23]], 8
+; CHECK-NEXT:    [[TMP25:%.*]] = ashr i64 [[TMP24]], 8
+; CHECK-NEXT:    [[TMP26:%.*]] = ashr i64 [[TMP25]], 4
+; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP26]]
+; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr i8, ptr [[TMP27]], i32 0
+; CHECK-NEXT:    store i8 4, ptr [[TMP28]], align 1
+; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[X]], i32 15
+; CHECK-NEXT:    store i8 [[TMP22]], ptr [[TMP29]], align 1
 ; CHECK-NEXT:    invoke void @mayFail(ptr [[X_HWASAN]])
-; CHECK-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
+; CHECK-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
 ; CHECK:       invoke.cont:
-; CHECK-NEXT:    [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
-; CHECK-NEXT:    [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
-; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP30]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP31:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP32:%.*]] = shl i64 [[TMP31]], 8
+; CHECK-NEXT:    [[TMP33:%.*]] = ashr i64 [[TMP32]], 8
+; CHECK-NEXT:    [[TMP34:%.*]] = ashr i64 [[TMP33]], 4
+; CHECK-NEXT:    [[TMP35:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP34]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 [[TMP30]], i64 1, i1 false)
 ; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
 ; CHECK-NEXT:    ret void
 ; CHECK:       lpad:
-; CHECK-NEXT:    [[TMP32:%.*]] = landingpad { ptr, i32 }
-; CHECK-NEXT:    cleanup
-; CHECK-NEXT:    [[TMP33:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 0
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EXN_SLOT]], i32 19)
-; CHECK-NEXT:    store ptr [[TMP33]], ptr [[EXN_SLOT]], align 8
-; CHECK-NEXT:    [[TMP34:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 1
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EHSELECTOR_SLOT]], i32 18)
-; CHECK-NEXT:    store i32 [[TMP34]], ptr [[EHSELECTOR_SLOT]], align 4
+; CHECK-NEXT:    [[TMP36:%.*]] = landingpad { ptr, i32 }
+; CHECK-NEXT:            cleanup
+; CHECK-NEXT:    [[TMP37:%.*]] = extractvalue { ptr, i32 } [[TMP36]], 0
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EXN_SLOT]], i32 19)
+; CHECK-NEXT:    store ptr [[TMP37]], ptr [[EXN_SLOT]], align 8
+; CHECK-NEXT:    [[TMP38:%.*]] = extractvalue { ptr, i32 } [[TMP36]], 1
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EHSELECTOR_SLOT]], i32 18)
+; CHECK-NEXT:    store i32 [[TMP38]], ptr [[EHSELECTOR_SLOT]], align 4
 ; CHECK-NEXT:    call void @onExcept(ptr [[X_HWASAN]])
-; CHECK-NEXT:    [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP36:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
-; CHECK-NEXT:    [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
-; CHECK-NEXT:    [[TMP39:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP38]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP35]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP39:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP40:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP41:%.*]] = shl i64 [[TMP40]], 8
+; CHECK-NEXT:    [[TMP42:%.*]] = ashr i64 [[TMP41]], 8
+; CHECK-NEXT:    [[TMP43:%.*]] = ashr i64 [[TMP42]], 4
+; CHECK-NEXT:    [[TMP44:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP43]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP44]], i8 [[TMP39]], i64 1, i1 false)
 ; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
 ; CHECK-NEXT:    br label [[EH_RESUME:%.*]]
 ; CHECK:       eh.resume:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EXN_SLOT]], i32 3)
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EXN_SLOT]], i32 3)
 ; CHECK-NEXT:    [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EHSELECTOR_SLOT]], i32 2)
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EHSELECTOR_SLOT]], i32 2)
 ; CHECK-NEXT:    [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4
 ; CHECK-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } undef, ptr [[EXN]], 0
 ; CHECK-NEXT:    [[LPAD_VAL1:%.*]] = insertvalue { ptr, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll
index db78c1f05b0df5..2a43e02c0f5ec8 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll
@@ -13,57 +13,61 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
 ; CHECK-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
-; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
-; CHECK-NEXT:    [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 44
-; CHECK-NEXT:    [[TMP6:%.*]] = or i64 ptrtoint (ptr @_Z6targetv to i64), [[TMP5]]
-; CHECK-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
-; CHECK-NEXT:    store i64 [[TMP6]], ptr [[TMP7]], align 8
-; CHECK-NEXT:    [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
-; CHECK-NEXT:    [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
-; CHECK-NEXT:    [[TMP10:%.*]] = xor i64 [[TMP9]], -1
-; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[TMP0]], 8
-; CHECK-NEXT:    [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
-; CHECK-NEXT:    store i64 [[TMP12]], ptr @__hwasan_tls, align 8
-; CHECK-NEXT:    [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
-; CHECK-NEXT:    [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT:    [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = ashr i64 [[TMP0]], 3
+; CHECK-NEXT:    [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP5]], 44
+; CHECK-NEXT:    [[TMP7:%.*]] = or i64 ptrtoint (ptr @_Z6targetv to i64), [[TMP6]]
+; CHECK-NEXT:    [[TMP8:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT:    store i64 [[TMP7]], ptr [[TMP8]], align 8
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP0]], 56
+; CHECK-NEXT:    [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12
+; CHECK-NEXT:    [[TMP11:%.*]] = xor i64 [[TMP10]], -1
+; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[TMP0]], 8
+; CHECK-NEXT:    [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]]
+; CHECK-NEXT:    store i64 [[TMP13]], ptr @__hwasan_tls, align 8
+; CHECK-NEXT:    [[TMP14:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP14]], 1
+; CHECK-NEXT:    [[TMP15:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT:    [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP5]], 56
 ; CHECK-NEXT:    [[BUF:%.*]] = alloca [4096 x i8], align 16
-; CHECK-NEXT:    [[TMP15:%.*]] = xor i64 [[TMP2]], 0
-; CHECK-NEXT:    [[TMP16:%.*]] = ptrtoint ptr [[BUF]] to i64
-; CHECK-NEXT:    [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935
-; CHECK-NEXT:    [[TMP18:%.*]] = shl i64 [[TMP15]], 56
-; CHECK-NEXT:    [[TMP19:%.*]] = or i64 [[TMP17]], [[TMP18]]
-; CHECK-NEXT:    [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr
-; CHECK-NEXT:    [[TMP20:%.*]] = trunc i64 [[TMP15]] to i8
-; CHECK-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[BUF]] to i64
-; CHECK-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; CHECK-NEXT:    [[TMP23:%.*]] = lshr i64 [[TMP22]], 4
-; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP23]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP24]], i8 [[TMP20]], i64 256, i1 false)
+; CHECK-NEXT:    [[TMP16:%.*]] = xor i64 [[TMP3]], 0
+; CHECK-NEXT:    [[TMP17:%.*]] = ptrtoint ptr [[BUF]] to i64
+; CHECK-NEXT:    [[TMP18:%.*]] = shl i64 [[TMP17]], 8
+; CHECK-NEXT:    [[TMP19:%.*]] = ashr i64 [[TMP18]], 8
+; CHECK-NEXT:    [[TMP20:%.*]] = shl i64 [[TMP16]], 56
+; CHECK-NEXT:    [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]
+; CHECK-NEXT:    [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
+; CHECK-NEXT:    [[TMP22:%.*]] = trunc i64 [[TMP16]] to i8
+; CHECK-NEXT:    [[TMP23:%.*]] = ptrtoint ptr [[BUF]] to i64
+; CHECK-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP23]], 8
+; CHECK-NEXT:    [[TMP25:%.*]] = ashr i64 [[TMP24]], 8
+; CHECK-NEXT:    [[TMP26:%.*]] = ashr i64 [[TMP25]], 4
+; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP26]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP22]], i64 256, i1 false)
 ; CHECK-NEXT:    [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf)
 ; CHECK-NEXT:    switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [
-; CHECK-NEXT:    i32 1, label [[RETURN:%.*]]
-; CHECK-NEXT:    i32 2, label [[SW_BB1:%.*]]
+; CHECK-NEXT:      i32 1, label [[RETURN:%.*]]
+; CHECK-NEXT:      i32 2, label [[SW_BB1:%.*]]
 ; CHECK-NEXT:    ]
 ; CHECK:       sw.bb1:
 ; CHECK-NEXT:    br label [[RETURN]]
 ; CHECK:       while.body:
-; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr @stackbuf, i32 19)
+; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr @stackbuf, i32 19)
 ; CHECK-NEXT:    store ptr [[BUF_HWASAN]], ptr @stackbuf, align 8
 ; CHECK-NEXT:    call void @may_jump()
 ; CHECK-NEXT:    br label [[RETURN]]
 ; CHECK:       return:
 ; CHECK-NEXT:    [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ]
-; CHECK-NEXT:    [[TMP25:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[BUF]] to i64
-; CHECK-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; CHECK-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP28]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 256, i1 false)
+; CHECK-NEXT:    [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP29:%.*]] = ptrtoint ptr [[BUF]] to i64
+; CHECK-NEXT:    [[TMP30:%.*]] = shl i64 [[TMP29]], 8
+; CHECK-NEXT:    [[TMP31:%.*]] = ashr i64 [[TMP30]], 8
+; CHECK-NEXT:    [[TMP32:%.*]] = ashr i64 [[TMP31]], 4
+; CHECK-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP32]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP33]], i8 [[TMP28]], i64 256, i1 false)
 ; CHECK-NEXT:    ret i1 [[RETVAL_0]]
 ;
 entry:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
index 72a0f6bc8df5b8..42a56b8eee75d0 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
@@ -20,26 +20,28 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16
 ; CHECK-NEXT:    [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
 ; CHECK-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; CHECK-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; CHECK-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; CHECK-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP11]], i64 16)
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 7
+; CHECK-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; CHECK-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 57
+; CHECK-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; CHECK-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP12]], i64 16)
 ; CHECK-NEXT:    [[Y:%.*]] = alloca i8, i64 16, align 16
-; CHECK-NEXT:    [[TMP12:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 1
-; CHECK-NEXT:    [[TMP13:%.*]] = ptrtoint ptr [[Y]] to i64
-; CHECK-NEXT:    [[TMP14:%.*]] = and i64 [[TMP13]], -9079256848778919937
-; CHECK-NEXT:    [[TMP15:%.*]] = shl i64 [[TMP12]], 57
-; CHECK-NEXT:    [[TMP16:%.*]] = or i64 [[TMP14]], [[TMP15]]
-; CHECK-NEXT:    [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP16]] to ptr
-; CHECK-NEXT:    [[TMP17:%.*]] = trunc i64 [[TMP12]] to i8
-; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP17]], i64 16)
-; CHECK-NEXT:    call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]])
-; CHECK-NEXT:    [[TMP18:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP18]], i64 16)
-; CHECK-NEXT:    [[TMP19:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP13:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 1
+; CHECK-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[Y]] to i64
+; CHECK-NEXT:    [[TMP15:%.*]] = shl i64 [[TMP14]], 7
+; CHECK-NEXT:    [[TMP16:%.*]] = ashr i64 [[TMP15]], 7
+; CHECK-NEXT:    [[TMP17:%.*]] = shl i64 [[TMP13]], 57
+; CHECK-NEXT:    [[TMP18:%.*]] = or i64 [[TMP16]], [[TMP17]]
+; CHECK-NEXT:    [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; CHECK-NEXT:    [[TMP19:%.*]] = trunc i64 [[TMP13]] to i8
 ; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP19]], i64 16)
+; CHECK-NEXT:    call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]])
+; CHECK-NEXT:    [[TMP20:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP20]], i64 16)
+; CHECK-NEXT:    [[TMP21:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP21]], i64 16)
 ; CHECK-NEXT:    ret void
 ;
   %x = alloca i8, i64 4
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
index 2a82d708a0ef13..59221b2687b1d0 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
@@ -21,15 +21,16 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
 ; CHECK-NEXT:    [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
 ; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP6:%.*]] = and i64 [[TMP5]], -9079256848778919937
-; CHECK-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP4]], 57
-; CHECK-NEXT:    [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]]
-; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
-; CHECK-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8
-; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP9]], i64 16)
-; CHECK-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]])
-; CHECK-NEXT:    [[TMP10:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP5]], 7
+; CHECK-NEXT:    [[TMP7:%.*]] = ashr i64 [[TMP6]], 7
+; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP4]], 57
+; CHECK-NEXT:    [[TMP9:%.*]] = or i64 [[TMP7]], [[TMP8]]
+; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr
+; CHECK-NEXT:    [[TMP10:%.*]] = trunc i64 [[TMP4]] to i8
 ; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16)
+; CHECK-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]])
+; CHECK-NEXT:    [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP11]], i64 16)
 ; CHECK-NEXT:    ret void
 ;
 
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
index 292a565a1e61bf..c4cd2e05e4e19e 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
@@ -24,63 +24,68 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; CHECK-NEXT:    [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
 ; CHECK-NEXT:    [[TMP6:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
-; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 57
-; CHECK-NEXT:    [[TMP9:%.*]] = or i64 [[TMP7]], [[TMP8]]
-; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr
-; CHECK-NEXT:    [[TMP10:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16)
-; CHECK-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]])
-; CHECK-NEXT:    [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP6]], 7
+; CHECK-NEXT:    [[TMP8:%.*]] = ashr i64 [[TMP7]], 7
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP5]], 57
+; CHECK-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
+; CHECK-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP5]] to i8
 ; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP11]], i64 16)
+; CHECK-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]])
+; CHECK-NEXT:    [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP12]], i64 16)
 ; CHECK-NEXT:    ret void
 ;
 ; INLINE-LABEL: define void @test_alloca
 ; INLINE-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk {
 ; INLINE-NEXT:  entry:
 ; INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
-; INLINE-NEXT:    [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
-; INLINE-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 44
-; INLINE-NEXT:    [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP5]]
-; INLINE-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
-; INLINE-NEXT:    store i64 [[TMP6]], ptr [[TMP7]], align 8
-; INLINE-NEXT:    [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
-; INLINE-NEXT:    [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
-; INLINE-NEXT:    [[TMP10:%.*]] = xor i64 [[TMP9]], -1
-; INLINE-NEXT:    [[TMP11:%.*]] = add i64 [[TMP0]], 8
-; INLINE-NEXT:    [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
-; INLINE-NEXT:    store i64 [[TMP12]], ptr @__hwasan_tls, align 8
-; INLINE-NEXT:    [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
-; INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
-; INLINE-NEXT:    [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; INLINE-NEXT:    [[TMP15:%.*]] = lshr i64 [[TMP4]], 57
-; INLINE-NEXT:    [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP15]], 63
+; INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; INLINE-NEXT:    [[TMP3:%.*]] = ashr i64 [[TMP0]], 3
+; INLINE-NEXT:    [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64
+; INLINE-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP5]], 44
+; INLINE-NEXT:    [[TMP7:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP6]]
+; INLINE-NEXT:    [[TMP8:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; INLINE-NEXT:    store i64 [[TMP7]], ptr [[TMP8]], align 8
+; INLINE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP0]], 56
+; INLINE-NEXT:    [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12
+; INLINE-NEXT:    [[TMP11:%.*]] = xor i64 [[TMP10]], -1
+; INLINE-NEXT:    [[TMP12:%.*]] = add i64 [[TMP0]], 8
+; INLINE-NEXT:    [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]]
+; INLINE-NEXT:    store i64 [[TMP13]], ptr @__hwasan_tls, align 8
+; INLINE-NEXT:    [[TMP14:%.*]] = or i64 [[TMP2]], 4294967295
+; INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP14]], 1
+; INLINE-NEXT:    [[TMP15:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; INLINE-NEXT:    [[TMP16:%.*]] = lshr i64 [[TMP5]], 57
+; INLINE-NEXT:    [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP16]], 63
 ; INLINE-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; INLINE-NEXT:    [[TMP16:%.*]] = xor i64 [[TMP2]], 0
-; INLINE-NEXT:    [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
-; INLINE-NEXT:    [[TMP18:%.*]] = and i64 [[TMP17]], -9079256848778919937
-; INLINE-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP16]], 57
-; INLINE-NEXT:    [[TMP20:%.*]] = or i64 [[TMP18]], [[TMP19]]
-; INLINE-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr
-; INLINE-NEXT:    [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8
-; INLINE-NEXT:    [[TMP22:%.*]] = ptrtoint ptr [[X]] to i64
-; INLINE-NEXT:    [[TMP23:%.*]] = and i64 [[TMP22]], -9079256848778919937
-; INLINE-NEXT:    [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
-; INLINE-NEXT:    [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]]
-; INLINE-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 0
-; INLINE-NEXT:    store i8 4, ptr [[TMP26]], align 1
-; INLINE-NEXT:    [[TMP27:%.*]] = getelementptr i8, ptr [[X]], i32 15
-; INLINE-NEXT:    store i8 [[TMP21]], ptr [[TMP27]], align 1
+; INLINE-NEXT:    [[TMP17:%.*]] = xor i64 [[TMP3]], 0
+; INLINE-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64
+; INLINE-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP18]], 7
+; INLINE-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 7
+; INLINE-NEXT:    [[TMP21:%.*]] = shl i64 [[TMP17]], 57
+; INLINE-NEXT:    [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
+; INLINE-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
+; INLINE-NEXT:    [[TMP23:%.*]] = trunc i64 [[TMP17]] to i8
+; INLINE-NEXT:    [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
+; INLINE-NEXT:    [[TMP25:%.*]] = shl i64 [[TMP24]], 7
+; INLINE-NEXT:    [[TMP26:%.*]] = ashr i64 [[TMP25]], 7
+; INLINE-NEXT:    [[TMP27:%.*]] = ashr i64 [[TMP26]], 4
+; INLINE-NEXT:    [[TMP28:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP27]]
+; INLINE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP28]], i32 0
+; INLINE-NEXT:    store i8 4, ptr [[TMP29]], align 1
+; INLINE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[X]], i32 15
+; INLINE-NEXT:    store i8 [[TMP23]], ptr [[TMP30]], align 1
 ; INLINE-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]])
-; INLINE-NEXT:    [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; INLINE-NEXT:    [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64
-; INLINE-NEXT:    [[TMP30:%.*]] = and i64 [[TMP29]], -9079256848778919937
-; INLINE-NEXT:    [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
-; INLINE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP31]]
-; INLINE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)
+; INLINE-NEXT:    [[TMP31:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; INLINE-NEXT:    [[TMP32:%.*]] = ptrtoint ptr [[X]] to i64
+; INLINE-NEXT:    [[TMP33:%.*]] = shl i64 [[TMP32]], 7
+; INLINE-NEXT:    [[TMP34:%.*]] = ashr i64 [[TMP33]], 7
+; INLINE-NEXT:    [[TMP35:%.*]] = ashr i64 [[TMP34]], 4
+; INLINE-NEXT:    [[TMP36:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP35]]
+; INLINE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP31]], i64 1, i1 false)
 ; INLINE-NEXT:    ret void
 ;
 entry:
@@ -105,18 +110,19 @@ define i32 @test_simple(ptr %a) sanitize_hwaddress {
 ; CHECK-NEXT:    [[BUF_SROA_0:%.*]] = alloca { i8, [15 x i8] }, align 16
 ; CHECK-NEXT:    [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
 ; CHECK-NEXT:    [[TMP6:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
-; CHECK-NEXT:    [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
-; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 57
-; CHECK-NEXT:    [[TMP9:%.*]] = or i64 [[TMP7]], [[TMP8]]
-; CHECK-NEXT:    [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr
+; CHECK-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP6]], 7
+; CHECK-NEXT:    [[TMP8:%.*]] = ashr i64 [[TMP7]], 7
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP5]], 57
+; CHECK-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; CHECK-NEXT:    [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
 ; CHECK-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[BUF_SROA_0]])
-; CHECK-NEXT:    [[TMP10:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP10]], i64 16)
-; CHECK-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64
-; CHECK-NEXT:    call void @__hwasan_store1(i64 [[TMP11]])
+; CHECK-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP5]] to i8
+; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP11]], i64 16)
+; CHECK-NEXT:    [[TMP12:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64
+; CHECK-NEXT:    call void @__hwasan_store1(i64 [[TMP12]])
 ; CHECK-NEXT:    store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4
-; CHECK-NEXT:    [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP12]], i64 16)
+; CHECK-NEXT:    [[TMP13:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP13]], i64 16)
 ; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[BUF_SROA_0]])
 ; CHECK-NEXT:    ret i32 0
 ;
@@ -124,79 +130,84 @@ define i32 @test_simple(ptr %a) sanitize_hwaddress {
 ; INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0]] personality ptr @__hwasan_personality_thunk {
 ; INLINE-NEXT:  entry:
 ; INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
-; INLINE-NEXT:    [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
-; INLINE-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 44
-; INLINE-NEXT:    [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_simple to i64), [[TMP5]]
-; INLINE-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
-; INLINE-NEXT:    store i64 [[TMP6]], ptr [[TMP7]], align 8
-; INLINE-NEXT:    [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
-; INLINE-NEXT:    [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
-; INLINE-NEXT:    [[TMP10:%.*]] = xor i64 [[TMP9]], -1
-; INLINE-NEXT:    [[TMP11:%.*]] = add i64 [[TMP0]], 8
-; INLINE-NEXT:    [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
-; INLINE-NEXT:    store i64 [[TMP12]], ptr @__hwasan_tls, align 8
-; INLINE-NEXT:    [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
-; INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
-; INLINE-NEXT:    [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; INLINE-NEXT:    [[TMP15:%.*]] = lshr i64 [[TMP4]], 57
-; INLINE-NEXT:    [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP15]], 63
+; INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; INLINE-NEXT:    [[TMP3:%.*]] = ashr i64 [[TMP0]], 3
+; INLINE-NEXT:    [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64
+; INLINE-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP5]], 44
+; INLINE-NEXT:    [[TMP7:%.*]] = or i64 ptrtoint (ptr @test_simple to i64), [[TMP6]]
+; INLINE-NEXT:    [[TMP8:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; INLINE-NEXT:    store i64 [[TMP7]], ptr [[TMP8]], align 8
+; INLINE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP0]], 56
+; INLINE-NEXT:    [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12
+; INLINE-NEXT:    [[TMP11:%.*]] = xor i64 [[TMP10]], -1
+; INLINE-NEXT:    [[TMP12:%.*]] = add i64 [[TMP0]], 8
+; INLINE-NEXT:    [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]]
+; INLINE-NEXT:    store i64 [[TMP13]], ptr @__hwasan_tls, align 8
+; INLINE-NEXT:    [[TMP14:%.*]] = or i64 [[TMP2]], 4294967295
+; INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP14]], 1
+; INLINE-NEXT:    [[TMP15:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; INLINE-NEXT:    [[TMP16:%.*]] = lshr i64 [[TMP5]], 57
+; INLINE-NEXT:    [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP16]], 63
 ; INLINE-NEXT:    [[BUF_SROA_0:%.*]] = alloca { i8, [15 x i8] }, align 16
-; INLINE-NEXT:    [[TMP16:%.*]] = xor i64 [[TMP2]], 0
-; INLINE-NEXT:    [[TMP17:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
-; INLINE-NEXT:    [[TMP18:%.*]] = and i64 [[TMP17]], -9079256848778919937
-; INLINE-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP16]], 57
-; INLINE-NEXT:    [[TMP20:%.*]] = or i64 [[TMP18]], [[TMP19]]
-; INLINE-NEXT:    [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr
+; INLINE-NEXT:    [[TMP17:%.*]] = xor i64 [[TMP3]], 0
+; INLINE-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
+; INLINE-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP18]], 7
+; INLINE-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 7
+; INLINE-NEXT:    [[TMP21:%.*]] = shl i64 [[TMP17]], 57
+; INLINE-NEXT:    [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
+; INLINE-NEXT:    [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
 ; INLINE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[BUF_SROA_0]])
-; INLINE-NEXT:    [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8
-; INLINE-NEXT:    [[TMP22:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
-; INLINE-NEXT:    [[TMP23:%.*]] = and i64 [[TMP22]], -9079256848778919937
-; INLINE-NEXT:    [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
-; INLINE-NEXT:    [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]]
-; INLINE-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 0
-; INLINE-NEXT:    store i8 1, ptr [[TMP26]], align 1
-; INLINE-NEXT:    [[TMP27:%.*]] = getelementptr i8, ptr [[BUF_SROA_0]], i32 15
-; INLINE-NEXT:    store i8 [[TMP21]], ptr [[TMP27]], align 1
-; INLINE-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64
-; INLINE-NEXT:    [[TMP29:%.*]] = lshr i64 [[TMP28]], 57
-; INLINE-NEXT:    [[TMP30:%.*]] = trunc i64 [[TMP29]] to i8
-; INLINE-NEXT:    [[TMP31:%.*]] = and i64 [[TMP28]], -9079256848778919937
-; INLINE-NEXT:    [[TMP32:%.*]] = lshr i64 [[TMP31]], 4
-; INLINE-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP32]]
-; INLINE-NEXT:    [[TMP34:%.*]] = load i8, ptr [[TMP33]], align 1
-; INLINE-NEXT:    [[TMP35:%.*]] = icmp ne i8 [[TMP30]], [[TMP34]]
-; INLINE-NEXT:    br i1 [[TMP35]], label [[TMP36:%.*]], label [[TMP50:%.*]], !prof [[PROF1:![0-9]+]]
-; INLINE:       36:
-; INLINE-NEXT:    [[TMP37:%.*]] = icmp ugt i8 [[TMP34]], 15
-; INLINE-NEXT:    br i1 [[TMP37]], label [[TMP38:%.*]], label [[TMP39:%.*]], !prof [[PROF1]]
-; INLINE:       38:
-; INLINE-NEXT:    call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP28]])
+; INLINE-NEXT:    [[TMP23:%.*]] = trunc i64 [[TMP17]] to i8
+; INLINE-NEXT:    [[TMP24:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
+; INLINE-NEXT:    [[TMP25:%.*]] = shl i64 [[TMP24]], 7
+; INLINE-NEXT:    [[TMP26:%.*]] = ashr i64 [[TMP25]], 7
+; INLINE-NEXT:    [[TMP27:%.*]] = ashr i64 [[TMP26]], 4
+; INLINE-NEXT:    [[TMP28:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP27]]
+; INLINE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP28]], i32 0
+; INLINE-NEXT:    store i8 1, ptr [[TMP29]], align 1
+; INLINE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[BUF_SROA_0]], i32 15
+; INLINE-NEXT:    store i8 [[TMP23]], ptr [[TMP30]], align 1
+; INLINE-NEXT:    [[TMP31:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64
+; INLINE-NEXT:    [[TMP32:%.*]] = lshr i64 [[TMP31]], 57
+; INLINE-NEXT:    [[TMP33:%.*]] = trunc i64 [[TMP32]] to i8
+; INLINE-NEXT:    [[TMP34:%.*]] = shl i64 [[TMP31]], 7
+; INLINE-NEXT:    [[TMP35:%.*]] = ashr i64 [[TMP34]], 7
+; INLINE-NEXT:    [[TMP36:%.*]] = ashr i64 [[TMP35]], 4
+; INLINE-NEXT:    [[TMP37:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP36]]
+; INLINE-NEXT:    [[TMP38:%.*]] = load i8, ptr [[TMP37]], align 1
+; INLINE-NEXT:    [[TMP39:%.*]] = icmp ne i8 [[TMP33]], [[TMP38]]
+; INLINE-NEXT:    br i1 [[TMP39]], label [[TMP40:%.*]], label [[TMP54:%.*]], !prof [[PROF2:![0-9]+]]
+; INLINE:       40:
+; INLINE-NEXT:    [[TMP41:%.*]] = icmp ugt i8 [[TMP38]], 15
+; INLINE-NEXT:    br i1 [[TMP41]], label [[TMP42:%.*]], label [[TMP43:%.*]], !prof [[PROF2]]
+; INLINE:       42:
+; INLINE-NEXT:    call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP31]])
 ; INLINE-NEXT:    unreachable
-; INLINE:       39:
-; INLINE-NEXT:    [[TMP40:%.*]] = and i64 [[TMP28]], 15
-; INLINE-NEXT:    [[TMP41:%.*]] = trunc i64 [[TMP40]] to i8
-; INLINE-NEXT:    [[TMP42:%.*]] = add i8 [[TMP41]], 0
-; INLINE-NEXT:    [[TMP43:%.*]] = icmp uge i8 [[TMP42]], [[TMP34]]
-; INLINE-NEXT:    br i1 [[TMP43]], label [[TMP38]], label [[TMP44:%.*]], !prof [[PROF1]]
-; INLINE:       44:
-; INLINE-NEXT:    [[TMP45:%.*]] = or i64 [[TMP31]], 15
-; INLINE-NEXT:    [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
-; INLINE-NEXT:    [[TMP47:%.*]] = load i8, ptr [[TMP46]], align 1
-; INLINE-NEXT:    [[TMP48:%.*]] = icmp ne i8 [[TMP30]], [[TMP47]]
-; INLINE-NEXT:    br i1 [[TMP48]], label [[TMP38]], label [[TMP49:%.*]], !prof [[PROF1]]
-; INLINE:       49:
-; INLINE-NEXT:    br label [[TMP50]]
-; INLINE:       50:
+; INLINE:       43:
+; INLINE-NEXT:    [[TMP44:%.*]] = and i64 [[TMP31]], 15
+; INLINE-NEXT:    [[TMP45:%.*]] = trunc i64 [[TMP44]] to i8
+; INLINE-NEXT:    [[TMP46:%.*]] = add i8 [[TMP45]], 0
+; INLINE-NEXT:    [[TMP47:%.*]] = icmp uge i8 [[TMP46]], [[TMP38]]
+; INLINE-NEXT:    br i1 [[TMP47]], label [[TMP42]], label [[TMP48:%.*]], !prof [[PROF2]]
+; INLINE:       48:
+; INLINE-NEXT:    [[TMP49:%.*]] = or i64 [[TMP31]], 15
+; INLINE-NEXT:    [[TMP50:%.*]] = inttoptr i64 [[TMP49]] to ptr
+; INLINE-NEXT:    [[TMP51:%.*]] = load i8, ptr [[TMP50]], align 1
+; INLINE-NEXT:    [[TMP52:%.*]] = icmp ne i8 [[TMP33]], [[TMP51]]
+; INLINE-NEXT:    br i1 [[TMP52]], label [[TMP42]], label [[TMP53:%.*]], !prof [[PROF2]]
+; INLINE:       53:
+; INLINE-NEXT:    br label [[TMP54]]
+; INLINE:       54:
 ; INLINE-NEXT:    store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4
-; INLINE-NEXT:    [[TMP51:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; INLINE-NEXT:    [[TMP52:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
-; INLINE-NEXT:    [[TMP53:%.*]] = and i64 [[TMP52]], -9079256848778919937
-; INLINE-NEXT:    [[TMP54:%.*]] = lshr i64 [[TMP53]], 4
-; INLINE-NEXT:    [[TMP55:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP54]]
-; INLINE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP55]], i8 [[TMP51]], i64 1, i1 false)
+; INLINE-NEXT:    [[TMP55:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; INLINE-NEXT:    [[TMP56:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
+; INLINE-NEXT:    [[TMP57:%.*]] = shl i64 [[TMP56]], 7
+; INLINE-NEXT:    [[TMP58:%.*]] = ashr i64 [[TMP57]], 7
+; INLINE-NEXT:    [[TMP59:%.*]] = ashr i64 [[TMP58]], 4
+; INLINE-NEXT:    [[TMP60:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP59]]
+; INLINE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP60]], i8 [[TMP55]], i64 1, i1 false)
 ; INLINE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[BUF_SROA_0]])
 ; INLINE-NEXT:    ret i32 0
 ;
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll
index ebe66e0d51baab..9188484aebe90e 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll
@@ -64,40 +64,42 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; ABORT-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
 ; ABORT-INLINE-NEXT:  entry:
 ; ABORT-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; ABORT-INLINE-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 57
-; ABORT-INLINE-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; ABORT-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937
-; ABORT-INLINE-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; ABORT-INLINE-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; ABORT-INLINE-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; ABORT-INLINE-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; ABORT-INLINE-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1:![0-9]+]]
-; ABORT-INLINE:       12:
-; ABORT-INLINE-NEXT:    [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
-; ABORT-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]
+; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; ABORT-INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; ABORT-INLINE-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 57
+; ABORT-INLINE-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; ABORT-INLINE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 7
+; ABORT-INLINE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; ABORT-INLINE-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; ABORT-INLINE-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; ABORT-INLINE-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; ABORT-INLINE-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; ABORT-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP28:%.*]], !prof [[PROF2:![0-9]+]]
 ; ABORT-INLINE:       14:
-; ABORT-INLINE-NEXT:    call void asm sideeffect "int3\0Anopl 64([[RAX:%.*]])", "{rdi}"(i64 [[TMP4]])
+; ABORT-INLINE-NEXT:    [[TMP15:%.*]] = icmp ugt i8 [[TMP12]], 15
+; ABORT-INLINE-NEXT:    br i1 [[TMP15]], label [[TMP16:%.*]], label [[TMP17:%.*]], !prof [[PROF2]]
+; ABORT-INLINE:       16:
+; ABORT-INLINE-NEXT:    call void asm sideeffect "int3\0Anopl 64([[RAX:%.*]])", "{rdi}"(i64 [[TMP5]])
 ; ABORT-INLINE-NEXT:    unreachable
-; ABORT-INLINE:       15:
-; ABORT-INLINE-NEXT:    [[TMP16:%.*]] = and i64 [[TMP4]], 15
-; ABORT-INLINE-NEXT:    [[TMP17:%.*]] = trunc i64 [[TMP16]] to i8
-; ABORT-INLINE-NEXT:    [[TMP18:%.*]] = add i8 [[TMP17]], 0
-; ABORT-INLINE-NEXT:    [[TMP19:%.*]] = icmp uge i8 [[TMP18]], [[TMP10]]
-; ABORT-INLINE-NEXT:    br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF1]]
-; ABORT-INLINE:       20:
-; ABORT-INLINE-NEXT:    [[TMP21:%.*]] = or i64 [[TMP7]], 15
-; ABORT-INLINE-NEXT:    [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
-; ABORT-INLINE-NEXT:    [[TMP23:%.*]] = load i8, ptr [[TMP22]], align 1
-; ABORT-INLINE-NEXT:    [[TMP24:%.*]] = icmp ne i8 [[TMP6]], [[TMP23]]
-; ABORT-INLINE-NEXT:    br i1 [[TMP24]], label [[TMP14]], label [[TMP25:%.*]], !prof [[PROF1]]
-; ABORT-INLINE:       25:
-; ABORT-INLINE-NEXT:    br label [[TMP26]]
-; ABORT-INLINE:       26:
+; ABORT-INLINE:       17:
+; ABORT-INLINE-NEXT:    [[TMP18:%.*]] = and i64 [[TMP5]], 15
+; ABORT-INLINE-NEXT:    [[TMP19:%.*]] = trunc i64 [[TMP18]] to i8
+; ABORT-INLINE-NEXT:    [[TMP20:%.*]] = add i8 [[TMP19]], 0
+; ABORT-INLINE-NEXT:    [[TMP21:%.*]] = icmp uge i8 [[TMP20]], [[TMP12]]
+; ABORT-INLINE-NEXT:    br i1 [[TMP21]], label [[TMP16]], label [[TMP22:%.*]], !prof [[PROF2]]
+; ABORT-INLINE:       22:
+; ABORT-INLINE-NEXT:    [[TMP23:%.*]] = or i64 [[TMP5]], 15
+; ABORT-INLINE-NEXT:    [[TMP24:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; ABORT-INLINE-NEXT:    [[TMP25:%.*]] = load i8, ptr [[TMP24]], align 1
+; ABORT-INLINE-NEXT:    [[TMP26:%.*]] = icmp ne i8 [[TMP7]], [[TMP25]]
+; ABORT-INLINE-NEXT:    br i1 [[TMP26]], label [[TMP16]], label [[TMP27:%.*]], !prof [[PROF2]]
+; ABORT-INLINE:       27:
+; ABORT-INLINE-NEXT:    br label [[TMP28]]
+; ABORT-INLINE:       28:
 ; ABORT-INLINE-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; ABORT-INLINE-NEXT:    ret i8 [[B]]
 ;
@@ -105,40 +107,42 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; RECOVER-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
 ; RECOVER-INLINE-NEXT:  entry:
 ; RECOVER-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; RECOVER-INLINE-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 57
-; RECOVER-INLINE-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; RECOVER-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937
-; RECOVER-INLINE-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; RECOVER-INLINE-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; RECOVER-INLINE-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; RECOVER-INLINE-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; RECOVER-INLINE-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1:![0-9]+]]
-; RECOVER-INLINE:       12:
-; RECOVER-INLINE-NEXT:    [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
-; RECOVER-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]
+; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; RECOVER-INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; RECOVER-INLINE-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 57
+; RECOVER-INLINE-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; RECOVER-INLINE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 7
+; RECOVER-INLINE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; RECOVER-INLINE-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; RECOVER-INLINE-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; RECOVER-INLINE-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; RECOVER-INLINE-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; RECOVER-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP28:%.*]], !prof [[PROF2:![0-9]+]]
 ; RECOVER-INLINE:       14:
-; RECOVER-INLINE-NEXT:    call void asm sideeffect "int3\0Anopl 96([[RAX:%.*]])", "{rdi}"(i64 [[TMP4]])
-; RECOVER-INLINE-NEXT:    br label [[TMP25:%.*]]
-; RECOVER-INLINE:       15:
-; RECOVER-INLINE-NEXT:    [[TMP16:%.*]] = and i64 [[TMP4]], 15
-; RECOVER-INLINE-NEXT:    [[TMP17:%.*]] = trunc i64 [[TMP16]] to i8
-; RECOVER-INLINE-NEXT:    [[TMP18:%.*]] = add i8 [[TMP17]], 0
-; RECOVER-INLINE-NEXT:    [[TMP19:%.*]] = icmp uge i8 [[TMP18]], [[TMP10]]
-; RECOVER-INLINE-NEXT:    br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF1]]
-; RECOVER-INLINE:       20:
-; RECOVER-INLINE-NEXT:    [[TMP21:%.*]] = or i64 [[TMP7]], 15
-; RECOVER-INLINE-NEXT:    [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
-; RECOVER-INLINE-NEXT:    [[TMP23:%.*]] = load i8, ptr [[TMP22]], align 1
-; RECOVER-INLINE-NEXT:    [[TMP24:%.*]] = icmp ne i8 [[TMP6]], [[TMP23]]
-; RECOVER-INLINE-NEXT:    br i1 [[TMP24]], label [[TMP14]], label [[TMP25]], !prof [[PROF1]]
-; RECOVER-INLINE:       25:
-; RECOVER-INLINE-NEXT:    br label [[TMP26]]
-; RECOVER-INLINE:       26:
+; RECOVER-INLINE-NEXT:    [[TMP15:%.*]] = icmp ugt i8 [[TMP12]], 15
+; RECOVER-INLINE-NEXT:    br i1 [[TMP15]], label [[TMP16:%.*]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-INLINE:       16:
+; RECOVER-INLINE-NEXT:    call void asm sideeffect "int3\0Anopl 96([[RAX:%.*]])", "{rdi}"(i64 [[TMP5]])
+; RECOVER-INLINE-NEXT:    br label [[TMP27:%.*]]
+; RECOVER-INLINE:       17:
+; RECOVER-INLINE-NEXT:    [[TMP18:%.*]] = and i64 [[TMP5]], 15
+; RECOVER-INLINE-NEXT:    [[TMP19:%.*]] = trunc i64 [[TMP18]] to i8
+; RECOVER-INLINE-NEXT:    [[TMP20:%.*]] = add i8 [[TMP19]], 0
+; RECOVER-INLINE-NEXT:    [[TMP21:%.*]] = icmp uge i8 [[TMP20]], [[TMP12]]
+; RECOVER-INLINE-NEXT:    br i1 [[TMP21]], label [[TMP16]], label [[TMP22:%.*]], !prof [[PROF2]]
+; RECOVER-INLINE:       22:
+; RECOVER-INLINE-NEXT:    [[TMP23:%.*]] = or i64 [[TMP5]], 15
+; RECOVER-INLINE-NEXT:    [[TMP24:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; RECOVER-INLINE-NEXT:    [[TMP25:%.*]] = load i8, ptr [[TMP24]], align 1
+; RECOVER-INLINE-NEXT:    [[TMP26:%.*]] = icmp ne i8 [[TMP7]], [[TMP25]]
+; RECOVER-INLINE-NEXT:    br i1 [[TMP26]], label [[TMP16]], label [[TMP27]], !prof [[PROF2]]
+; RECOVER-INLINE:       27:
+; RECOVER-INLINE-NEXT:    br label [[TMP28]]
+; RECOVER-INLINE:       28:
 ; RECOVER-INLINE-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; RECOVER-INLINE-NEXT:    ret i8 [[B]]
 ;
@@ -197,12 +201,13 @@ define i40 @test_load40(ptr %a) sanitize_hwaddress {
 ; ABORT-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; ABORT-INLINE-NEXT:  entry:
 ; ABORT-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; ABORT-INLINE-NEXT:    call void @__hwasan_loadN(i64 [[TMP4]], i64 5)
+; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; ABORT-INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; ABORT-INLINE-NEXT:    call void @__hwasan_loadN(i64 [[TMP5]], i64 5)
 ; ABORT-INLINE-NEXT:    [[B:%.*]] = load i40, ptr [[A]], align 4
 ; ABORT-INLINE-NEXT:    ret i40 [[B]]
 ;
@@ -210,12 +215,13 @@ define i40 @test_load40(ptr %a) sanitize_hwaddress {
 ; RECOVER-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; RECOVER-INLINE-NEXT:  entry:
 ; RECOVER-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; RECOVER-INLINE-NEXT:    call void @__hwasan_loadN_noabort(i64 [[TMP4]], i64 5)
+; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; RECOVER-INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; RECOVER-INLINE-NEXT:    call void @__hwasan_loadN_noabort(i64 [[TMP5]], i64 5)
 ; RECOVER-INLINE-NEXT:    [[B:%.*]] = load i40, ptr [[A]], align 4
 ; RECOVER-INLINE-NEXT:    ret i40 [[B]]
 ;
@@ -274,40 +280,42 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; ABORT-INLINE-SAME: (ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
 ; ABORT-INLINE-NEXT:  entry:
 ; ABORT-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; ABORT-INLINE-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 57
-; ABORT-INLINE-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; ABORT-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937
-; ABORT-INLINE-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; ABORT-INLINE-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; ABORT-INLINE-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; ABORT-INLINE-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; ABORT-INLINE-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]
-; ABORT-INLINE:       12:
-; ABORT-INLINE-NEXT:    [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
-; ABORT-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]
+; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; ABORT-INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; ABORT-INLINE-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 57
+; ABORT-INLINE-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; ABORT-INLINE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 7
+; ABORT-INLINE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; ABORT-INLINE-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; ABORT-INLINE-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; ABORT-INLINE-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; ABORT-INLINE-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; ABORT-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP28:%.*]], !prof [[PROF2]]
 ; ABORT-INLINE:       14:
-; ABORT-INLINE-NEXT:    call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP4]])
+; ABORT-INLINE-NEXT:    [[TMP15:%.*]] = icmp ugt i8 [[TMP12]], 15
+; ABORT-INLINE-NEXT:    br i1 [[TMP15]], label [[TMP16:%.*]], label [[TMP17:%.*]], !prof [[PROF2]]
+; ABORT-INLINE:       16:
+; ABORT-INLINE-NEXT:    call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP5]])
 ; ABORT-INLINE-NEXT:    unreachable
-; ABORT-INLINE:       15:
-; ABORT-INLINE-NEXT:    [[TMP16:%.*]] = and i64 [[TMP4]], 15
-; ABORT-INLINE-NEXT:    [[TMP17:%.*]] = trunc i64 [[TMP16]] to i8
-; ABORT-INLINE-NEXT:    [[TMP18:%.*]] = add i8 [[TMP17]], 0
-; ABORT-INLINE-NEXT:    [[TMP19:%.*]] = icmp uge i8 [[TMP18]], [[TMP10]]
-; ABORT-INLINE-NEXT:    br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF1]]
-; ABORT-INLINE:       20:
-; ABORT-INLINE-NEXT:    [[TMP21:%.*]] = or i64 [[TMP7]], 15
-; ABORT-INLINE-NEXT:    [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
-; ABORT-INLINE-NEXT:    [[TMP23:%.*]] = load i8, ptr [[TMP22]], align 1
-; ABORT-INLINE-NEXT:    [[TMP24:%.*]] = icmp ne i8 [[TMP6]], [[TMP23]]
-; ABORT-INLINE-NEXT:    br i1 [[TMP24]], label [[TMP14]], label [[TMP25:%.*]], !prof [[PROF1]]
-; ABORT-INLINE:       25:
-; ABORT-INLINE-NEXT:    br label [[TMP26]]
-; ABORT-INLINE:       26:
+; ABORT-INLINE:       17:
+; ABORT-INLINE-NEXT:    [[TMP18:%.*]] = and i64 [[TMP5]], 15
+; ABORT-INLINE-NEXT:    [[TMP19:%.*]] = trunc i64 [[TMP18]] to i8
+; ABORT-INLINE-NEXT:    [[TMP20:%.*]] = add i8 [[TMP19]], 0
+; ABORT-INLINE-NEXT:    [[TMP21:%.*]] = icmp uge i8 [[TMP20]], [[TMP12]]
+; ABORT-INLINE-NEXT:    br i1 [[TMP21]], label [[TMP16]], label [[TMP22:%.*]], !prof [[PROF2]]
+; ABORT-INLINE:       22:
+; ABORT-INLINE-NEXT:    [[TMP23:%.*]] = or i64 [[TMP5]], 15
+; ABORT-INLINE-NEXT:    [[TMP24:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; ABORT-INLINE-NEXT:    [[TMP25:%.*]] = load i8, ptr [[TMP24]], align 1
+; ABORT-INLINE-NEXT:    [[TMP26:%.*]] = icmp ne i8 [[TMP7]], [[TMP25]]
+; ABORT-INLINE-NEXT:    br i1 [[TMP26]], label [[TMP16]], label [[TMP27:%.*]], !prof [[PROF2]]
+; ABORT-INLINE:       27:
+; ABORT-INLINE-NEXT:    br label [[TMP28]]
+; ABORT-INLINE:       28:
 ; ABORT-INLINE-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; ABORT-INLINE-NEXT:    ret void
 ;
@@ -315,40 +323,42 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; RECOVER-INLINE-SAME: (ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
 ; RECOVER-INLINE-NEXT:  entry:
 ; RECOVER-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; RECOVER-INLINE-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 57
-; RECOVER-INLINE-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; RECOVER-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937
-; RECOVER-INLINE-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
-; RECOVER-INLINE-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
-; RECOVER-INLINE-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
-; RECOVER-INLINE-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; RECOVER-INLINE-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]
-; RECOVER-INLINE:       12:
-; RECOVER-INLINE-NEXT:    [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
-; RECOVER-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]
+; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; RECOVER-INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; RECOVER-INLINE-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 57
+; RECOVER-INLINE-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; RECOVER-INLINE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP5]], 7
+; RECOVER-INLINE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; RECOVER-INLINE-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP9]], 4
+; RECOVER-INLINE-NEXT:    [[TMP11:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP10]]
+; RECOVER-INLINE-NEXT:    [[TMP12:%.*]] = load i8, ptr [[TMP11]], align 1
+; RECOVER-INLINE-NEXT:    [[TMP13:%.*]] = icmp ne i8 [[TMP7]], [[TMP12]]
+; RECOVER-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP28:%.*]], !prof [[PROF2]]
 ; RECOVER-INLINE:       14:
-; RECOVER-INLINE-NEXT:    call void asm sideeffect "int3\0Anopl 112([[RAX:%.*]])", "{rdi}"(i64 [[TMP4]])
-; RECOVER-INLINE-NEXT:    br label [[TMP25:%.*]]
-; RECOVER-INLINE:       15:
-; RECOVER-INLINE-NEXT:    [[TMP16:%.*]] = and i64 [[TMP4]], 15
-; RECOVER-INLINE-NEXT:    [[TMP17:%.*]] = trunc i64 [[TMP16]] to i8
-; RECOVER-INLINE-NEXT:    [[TMP18:%.*]] = add i8 [[TMP17]], 0
-; RECOVER-INLINE-NEXT:    [[TMP19:%.*]] = icmp uge i8 [[TMP18]], [[TMP10]]
-; RECOVER-INLINE-NEXT:    br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF1]]
-; RECOVER-INLINE:       20:
-; RECOVER-INLINE-NEXT:    [[TMP21:%.*]] = or i64 [[TMP7]], 15
-; RECOVER-INLINE-NEXT:    [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
-; RECOVER-INLINE-NEXT:    [[TMP23:%.*]] = load i8, ptr [[TMP22]], align 1
-; RECOVER-INLINE-NEXT:    [[TMP24:%.*]] = icmp ne i8 [[TMP6]], [[TMP23]]
-; RECOVER-INLINE-NEXT:    br i1 [[TMP24]], label [[TMP14]], label [[TMP25]], !prof [[PROF1]]
-; RECOVER-INLINE:       25:
-; RECOVER-INLINE-NEXT:    br label [[TMP26]]
-; RECOVER-INLINE:       26:
+; RECOVER-INLINE-NEXT:    [[TMP15:%.*]] = icmp ugt i8 [[TMP12]], 15
+; RECOVER-INLINE-NEXT:    br i1 [[TMP15]], label [[TMP16:%.*]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-INLINE:       16:
+; RECOVER-INLINE-NEXT:    call void asm sideeffect "int3\0Anopl 112([[RAX:%.*]])", "{rdi}"(i64 [[TMP5]])
+; RECOVER-INLINE-NEXT:    br label [[TMP27:%.*]]
+; RECOVER-INLINE:       17:
+; RECOVER-INLINE-NEXT:    [[TMP18:%.*]] = and i64 [[TMP5]], 15
+; RECOVER-INLINE-NEXT:    [[TMP19:%.*]] = trunc i64 [[TMP18]] to i8
+; RECOVER-INLINE-NEXT:    [[TMP20:%.*]] = add i8 [[TMP19]], 0
+; RECOVER-INLINE-NEXT:    [[TMP21:%.*]] = icmp uge i8 [[TMP20]], [[TMP12]]
+; RECOVER-INLINE-NEXT:    br i1 [[TMP21]], label [[TMP16]], label [[TMP22:%.*]], !prof [[PROF2]]
+; RECOVER-INLINE:       22:
+; RECOVER-INLINE-NEXT:    [[TMP23:%.*]] = or i64 [[TMP5]], 15
+; RECOVER-INLINE-NEXT:    [[TMP24:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; RECOVER-INLINE-NEXT:    [[TMP25:%.*]] = load i8, ptr [[TMP24]], align 1
+; RECOVER-INLINE-NEXT:    [[TMP26:%.*]] = icmp ne i8 [[TMP7]], [[TMP25]]
+; RECOVER-INLINE-NEXT:    br i1 [[TMP26]], label [[TMP16]], label [[TMP27]], !prof [[PROF2]]
+; RECOVER-INLINE:       27:
+; RECOVER-INLINE-NEXT:    br label [[TMP28]]
+; RECOVER-INLINE:       28:
 ; RECOVER-INLINE-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; RECOVER-INLINE-NEXT:    ret void
 ;
@@ -407,12 +417,13 @@ define void @test_store40(ptr %a, i40 %b) sanitize_hwaddress {
 ; ABORT-INLINE-SAME: (ptr [[A:%.*]], i40 [[B:%.*]]) #[[ATTR0]] {
 ; ABORT-INLINE-NEXT:  entry:
 ; ABORT-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; ABORT-INLINE-NEXT:    call void @__hwasan_storeN(i64 [[TMP4]], i64 5)
+; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; ABORT-INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; ABORT-INLINE-NEXT:    call void @__hwasan_storeN(i64 [[TMP5]], i64 5)
 ; ABORT-INLINE-NEXT:    store i40 [[B]], ptr [[A]], align 4
 ; ABORT-INLINE-NEXT:    ret void
 ;
@@ -420,12 +431,13 @@ define void @test_store40(ptr %a, i40 %b) sanitize_hwaddress {
 ; RECOVER-INLINE-SAME: (ptr [[A:%.*]], i40 [[B:%.*]]) #[[ATTR0]] {
 ; RECOVER-INLINE-NEXT:  entry:
 ; RECOVER-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; RECOVER-INLINE-NEXT:    call void @__hwasan_storeN_noabort(i64 [[TMP4]], i64 5)
+; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; RECOVER-INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; RECOVER-INLINE-NEXT:    call void @__hwasan_storeN_noabort(i64 [[TMP5]], i64 5)
 ; RECOVER-INLINE-NEXT:    store i40 [[B]], ptr [[A]], align 4
 ; RECOVER-INLINE-NEXT:    ret void
 ;
@@ -484,12 +496,13 @@ define void @test_store_unaligned(ptr %a, i64 %b) sanitize_hwaddress {
 ; ABORT-INLINE-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
 ; ABORT-INLINE-NEXT:  entry:
 ; ABORT-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; ABORT-INLINE-NEXT:    call void @__hwasan_storeN(i64 [[TMP4]], i64 8)
+; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; ABORT-INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; ABORT-INLINE-NEXT:    call void @__hwasan_storeN(i64 [[TMP5]], i64 8)
 ; ABORT-INLINE-NEXT:    store i64 [[B]], ptr [[A]], align 4
 ; ABORT-INLINE-NEXT:    ret void
 ;
@@ -497,12 +510,13 @@ define void @test_store_unaligned(ptr %a, i64 %b) sanitize_hwaddress {
 ; RECOVER-INLINE-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
 ; RECOVER-INLINE-NEXT:  entry:
 ; RECOVER-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
-; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
-; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
-; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
-; RECOVER-INLINE-NEXT:    call void @__hwasan_storeN_noabort(i64 [[TMP4]], i64 8)
+; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = shl i64 [[TMP0]], 7
+; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP1]], 7
+; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = or i64 [[TMP2]], 4294967295
+; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP3]], 1
+; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; RECOVER-INLINE-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[A]] to i64
+; RECOVER-INLINE-NEXT:    call void @__hwasan_storeN_noabort(i64 [[TMP5]], i64 8)
 ; RECOVER-INLINE-NEXT:    store i64 [[B]], ptr [[A]], align 4
 ; RECOVER-INLINE-NEXT:    ret void
 ;
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
index 51d34ce5b38826..5dd5e4bd8ce20f 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
@@ -13,7 +13,7 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; CHECK-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; CHECK-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; CHECK-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; CHECK-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; CHECK-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -33,42 +33,48 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16
 ; CHECK-NEXT:    [[TMP18:%.*]] = xor i64 [[TMP4]], 0
 ; CHECK-NEXT:    [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
-; CHECK-NEXT:    [[TMP21:%.*]] = shl i64 [[TMP18]], 56
-; CHECK-NEXT:    [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
-; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
-; CHECK-NEXT:    [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8
-; CHECK-NEXT:    [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP25:%.*]] = and i64 [[TMP24]], 72057594037927935
-; CHECK-NEXT:    [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
-; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP23]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP20:%.*]] = shl i64 [[TMP19]], 8
+; CHECK-NEXT:    [[TMP21:%.*]] = ashr i64 [[TMP20]], 8
+; CHECK-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP18]], 56
+; CHECK-NEXT:    [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; CHECK-NEXT:    [[TMP24:%.*]] = trunc i64 [[TMP18]] to i8
+; CHECK-NEXT:    [[TMP25:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP26:%.*]] = shl i64 [[TMP25]], 8
+; CHECK-NEXT:    [[TMP27:%.*]] = ashr i64 [[TMP26]], 8
+; CHECK-NEXT:    [[TMP28:%.*]] = ashr i64 [[TMP27]], 4
+; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP24]], i64 1, i1 false)
 ; CHECK-NEXT:    [[Y:%.*]] = alloca i8, i64 16, align 16
-; CHECK-NEXT:    [[TMP28:%.*]] = xor i64 [[TMP4]], 128
-; CHECK-NEXT:    [[TMP29:%.*]] = ptrtoint ptr [[Y]] to i64
-; CHECK-NEXT:    [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935
-; CHECK-NEXT:    [[TMP31:%.*]] = shl i64 [[TMP28]], 56
-; CHECK-NEXT:    [[TMP32:%.*]] = or i64 [[TMP30]], [[TMP31]]
-; CHECK-NEXT:    [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP32]] to ptr
-; CHECK-NEXT:    [[TMP33:%.*]] = trunc i64 [[TMP28]] to i8
-; CHECK-NEXT:    [[TMP34:%.*]] = ptrtoint ptr [[Y]] to i64
-; CHECK-NEXT:    [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
-; CHECK-NEXT:    [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
-; CHECK-NEXT:    [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP33]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP30:%.*]] = xor i64 [[TMP4]], 128
+; CHECK-NEXT:    [[TMP31:%.*]] = ptrtoint ptr [[Y]] to i64
+; CHECK-NEXT:    [[TMP32:%.*]] = shl i64 [[TMP31]], 8
+; CHECK-NEXT:    [[TMP33:%.*]] = ashr i64 [[TMP32]], 8
+; CHECK-NEXT:    [[TMP34:%.*]] = shl i64 [[TMP30]], 56
+; CHECK-NEXT:    [[TMP35:%.*]] = or i64 [[TMP33]], [[TMP34]]
+; CHECK-NEXT:    [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP35]] to ptr
+; CHECK-NEXT:    [[TMP36:%.*]] = trunc i64 [[TMP30]] to i8
+; CHECK-NEXT:    [[TMP37:%.*]] = ptrtoint ptr [[Y]] to i64
+; CHECK-NEXT:    [[TMP38:%.*]] = shl i64 [[TMP37]], 8
+; CHECK-NEXT:    [[TMP39:%.*]] = ashr i64 [[TMP38]], 8
+; CHECK-NEXT:    [[TMP40:%.*]] = ashr i64 [[TMP39]], 4
+; CHECK-NEXT:    [[TMP41:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP40]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP41]], i8 [[TMP36]], i64 1, i1 false)
 ; CHECK-NEXT:    call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]])
-; CHECK-NEXT:    [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP39:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
-; CHECK-NEXT:    [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
-; CHECK-NEXT:    [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
-; CHECK-NEXT:    [[TMP43:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP44:%.*]] = ptrtoint ptr [[Y]] to i64
-; CHECK-NEXT:    [[TMP45:%.*]] = and i64 [[TMP44]], 72057594037927935
-; CHECK-NEXT:    [[TMP46:%.*]] = lshr i64 [[TMP45]], 4
+; CHECK-NEXT:    [[TMP42:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP43:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP44:%.*]] = shl i64 [[TMP43]], 8
+; CHECK-NEXT:    [[TMP45:%.*]] = ashr i64 [[TMP44]], 8
+; CHECK-NEXT:    [[TMP46:%.*]] = ashr i64 [[TMP45]], 4
 ; CHECK-NEXT:    [[TMP47:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP46]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP47]], i8 [[TMP43]], i64 1, i1 false)
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP47]], i8 [[TMP42]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP48:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP49:%.*]] = ptrtoint ptr [[Y]] to i64
+; CHECK-NEXT:    [[TMP50:%.*]] = shl i64 [[TMP49]], 8
+; CHECK-NEXT:    [[TMP51:%.*]] = ashr i64 [[TMP50]], 8
+; CHECK-NEXT:    [[TMP52:%.*]] = ashr i64 [[TMP51]], 4
+; CHECK-NEXT:    [[TMP53:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP52]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP53]], i8 [[TMP48]], i64 1, i1 false)
 ; CHECK-NEXT:    ret void
 ;
   %x = alloca i8, i64 4
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
index 9e9ed50d35daf6..3090fa3fa9496f 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
@@ -15,7 +15,7 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; CHECK-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; CHECK-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; CHECK-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; CHECK-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; CHECK-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; CHECK-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -35,23 +35,26 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; CHECK-NEXT:    [[TMP18:%.*]] = xor i64 [[TMP4]], 0
 ; CHECK-NEXT:    [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
-; CHECK-NEXT:    [[TMP21:%.*]] = shl i64 [[TMP18]], 56
-; CHECK-NEXT:    [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
-; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
-; CHECK-NEXT:    [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8
-; CHECK-NEXT:    [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP25:%.*]] = and i64 [[TMP24]], 72057594037927935
-; CHECK-NEXT:    [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
-; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP23]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP20:%.*]] = shl i64 [[TMP19]], 8
+; CHECK-NEXT:    [[TMP21:%.*]] = ashr i64 [[TMP20]], 8
+; CHECK-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP18]], 56
+; CHECK-NEXT:    [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; CHECK-NEXT:    [[TMP24:%.*]] = trunc i64 [[TMP18]] to i8
+; CHECK-NEXT:    [[TMP25:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP26:%.*]] = shl i64 [[TMP25]], 8
+; CHECK-NEXT:    [[TMP27:%.*]] = ashr i64 [[TMP26]], 8
+; CHECK-NEXT:    [[TMP28:%.*]] = ashr i64 [[TMP27]], 4
+; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP24]], i64 1, i1 false)
 ; CHECK-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]])
-; CHECK-NEXT:    [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935
-; CHECK-NEXT:    [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
-; CHECK-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP31:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP32:%.*]] = shl i64 [[TMP31]], 8
+; CHECK-NEXT:    [[TMP33:%.*]] = ashr i64 [[TMP32]], 8
+; CHECK-NEXT:    [[TMP34:%.*]] = ashr i64 [[TMP33]], 4
+; CHECK-NEXT:    [[TMP35:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP34]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 [[TMP30]], i64 1, i1 false)
 ; CHECK-NEXT:    ret void
 ;
   %x = alloca i32, align 4
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
index 0ef09321e41adc..4a915f92592248 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
@@ -16,7 +16,7 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
 ; CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
 ; CHECK-NEXT:    [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; CHECK-NEXT:    [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT:    [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; CHECK-NEXT:    [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; CHECK-NEXT:    [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
 ; CHECK-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP6]], 44
@@ -37,23 +37,26 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[TMP17:%.*]] = call i8 @__hwasan_generate_tag()
 ; CHECK-NEXT:    [[TMP18:%.*]] = zext i8 [[TMP17]] to i64
 ; CHECK-NEXT:    [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
-; CHECK-NEXT:    [[TMP21:%.*]] = shl i64 [[TMP18]], 56
-; CHECK-NEXT:    [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
-; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
-; CHECK-NEXT:    [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8
-; CHECK-NEXT:    [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP25:%.*]] = and i64 [[TMP24]], 72057594037927935
-; CHECK-NEXT:    [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
-; CHECK-NEXT:    [[TMP27:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP26]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP23]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP20:%.*]] = shl i64 [[TMP19]], 8
+; CHECK-NEXT:    [[TMP21:%.*]] = ashr i64 [[TMP20]], 8
+; CHECK-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP18]], 56
+; CHECK-NEXT:    [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; CHECK-NEXT:    [[TMP24:%.*]] = trunc i64 [[TMP18]] to i8
+; CHECK-NEXT:    [[TMP25:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP26:%.*]] = shl i64 [[TMP25]], 8
+; CHECK-NEXT:    [[TMP27:%.*]] = ashr i64 [[TMP26]], 8
+; CHECK-NEXT:    [[TMP28:%.*]] = ashr i64 [[TMP27]], 4
+; CHECK-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP28]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP24]], i64 1, i1 false)
 ; CHECK-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]])
-; CHECK-NEXT:    [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935
-; CHECK-NEXT:    [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
-; CHECK-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP31]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP31:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP32:%.*]] = shl i64 [[TMP31]], 8
+; CHECK-NEXT:    [[TMP33:%.*]] = ashr i64 [[TMP32]], 8
+; CHECK-NEXT:    [[TMP34:%.*]] = ashr i64 [[TMP33]], 4
+; CHECK-NEXT:    [[TMP35:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP34]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 [[TMP30]], i64 1, i1 false)
 ; CHECK-NEXT:    ret void
 ;
 
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
index 451ab9ee184a3a..06035410357b8a 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
@@ -46,26 +46,29 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
 ; DYNAMIC-SHADOW-NEXT:      #dbg_value(!DIArgList(ptr [[X]], ptr [[X]]), [[META11:![0-9]+]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref), [[META13:![0-9]+]])
 ; DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG14:![0-9]+]]
 ; DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]], !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 8, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = ashr i64 [[TMP5]], 8, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]], !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP11:%.*]] = shl i64 [[TMP10]], 8, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP11]], 8, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = ashr i64 [[TMP12]], 4, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP13]], !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = getelementptr i8, ptr [[TMP14]], i32 0, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    store i8 4, ptr [[TMP15]], align 1, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT:    store i8 [[TMP9]], ptr [[TMP16]], align 1, !dbg [[DBG14]]
 ; DYNAMIC-SHADOW-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG15:![0-9]+]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG15]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG15]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG15]]
-; DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP18]], !dbg [[DBG15]]
-; DYNAMIC-SHADOW-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG15:![0-9]+]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP18]], 8, !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 8, !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = ashr i64 [[TMP20]], 4, !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    [[TMP22:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP21]], !dbg [[DBG15]]
+; DYNAMIC-SHADOW-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP22]], i8 [[TMP17]], i64 1, i1 false), !dbg [[DBG15]]
 ; DYNAMIC-SHADOW-NEXT:    ret void, !dbg [[DBG15]]
 ;
 ; ZERO-BASED-SHADOW-LABEL: define void @test_alloca(
@@ -81,26 +84,29 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
 ; ZERO-BASED-SHADOW-NEXT:      #dbg_value(!DIArgList(ptr [[X]], ptr [[X]]), [[META11:![0-9]+]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref), [[META13:![0-9]+]])
 ; ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG14:![0-9]+]]
 ; ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 8, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = ashr i64 [[TMP5]], 8, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]], !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP11:%.*]] = shl i64 [[TMP10]], 8, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP11]], 8, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = ashr i64 [[TMP12]], 4, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = getelementptr i8, ptr [[TMP14]], i32 0, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    store i8 4, ptr [[TMP15]], align 1, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT:    store i8 [[TMP9]], ptr [[TMP16]], align 1, !dbg [[DBG14]]
 ; ZERO-BASED-SHADOW-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG15:![0-9]+]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG15]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG15]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG15]]
-; ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr, !dbg [[DBG15]]
-; ZERO-BASED-SHADOW-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG15:![0-9]+]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP18]], 8, !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 8, !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = ashr i64 [[TMP20]], 4, !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr, !dbg [[DBG15]]
+; ZERO-BASED-SHADOW-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP22]], i8 [[TMP17]], i64 1, i1 false), !dbg [[DBG15]]
 ; ZERO-BASED-SHADOW-NEXT:    ret void, !dbg [[DBG15]]
 ;
 entry:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/basic.ll b/llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
index 355e3b94978b39..af72f349569664 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
@@ -37,16 +37,17 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; FASTPATH-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; FASTPATH-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; FASTPATH-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; FASTPATH-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; FASTPATH-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; FASTPATH-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; FASTPATH-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2:![0-9]+]]
-; FASTPATH:       8:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 0)
-; FASTPATH-NEXT:    br label [[TMP9]]
+; FASTPATH-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; FASTPATH-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; FASTPATH-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; FASTPATH-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; FASTPATH-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2:![0-9]+]]
 ; FASTPATH:       9:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 0)
+; FASTPATH-NEXT:    br label [[TMP10]]
+; FASTPATH:       10:
 ; FASTPATH-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret i8 [[B]]
 ;
@@ -65,33 +66,34 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2:![0-9]+]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2336", "{x0}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2:![0-9]+]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 0
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2336", "{x0}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 0
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret i8 [[B]]
 ;
@@ -110,33 +112,34 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2:![0-9]+]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2336", "{x0}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2:![0-9]+]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 0
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2336", "{x0}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 0
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret i8 [[B]]
 ;
@@ -169,16 +172,17 @@ define i16 @test_load16(ptr %a) sanitize_hwaddress {
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; FASTPATH-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; FASTPATH-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; FASTPATH-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; FASTPATH-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; FASTPATH-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; FASTPATH-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; FASTPATH-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; FASTPATH:       8:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 1)
-; FASTPATH-NEXT:    br label [[TMP9]]
+; FASTPATH-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; FASTPATH-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; FASTPATH-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; FASTPATH-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; FASTPATH-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; FASTPATH:       9:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 1)
+; FASTPATH-NEXT:    br label [[TMP10]]
+; FASTPATH:       10:
 ; FASTPATH-NEXT:    [[B:%.*]] = load i16, ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret i16 [[B]]
 ;
@@ -197,33 +201,34 @@ define i16 @test_load16(ptr %a) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2337", "{x0}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2337", "{x0}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i16, ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret i16 [[B]]
 ;
@@ -242,33 +247,34 @@ define i16 @test_load16(ptr %a) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2337", "{x0}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2337", "{x0}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i16, ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret i16 [[B]]
 ;
@@ -301,16 +307,17 @@ define i32 @test_load32(ptr %a) sanitize_hwaddress {
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; FASTPATH-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; FASTPATH-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; FASTPATH-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; FASTPATH-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; FASTPATH-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; FASTPATH-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; FASTPATH-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; FASTPATH:       8:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2)
-; FASTPATH-NEXT:    br label [[TMP9]]
+; FASTPATH-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; FASTPATH-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; FASTPATH-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; FASTPATH-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; FASTPATH-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; FASTPATH:       9:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2)
+; FASTPATH-NEXT:    br label [[TMP10]]
+; FASTPATH:       10:
 ; FASTPATH-NEXT:    [[B:%.*]] = load i32, ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret i32 [[B]]
 ;
@@ -329,33 +336,34 @@ define i32 @test_load32(ptr %a) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2338", "{x0}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 3
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2338", "{x0}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 3
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i32, ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret i32 [[B]]
 ;
@@ -374,33 +382,34 @@ define i32 @test_load32(ptr %a) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2338", "{x0}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 3
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2338", "{x0}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 3
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i32, ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret i32 [[B]]
 ;
@@ -433,16 +442,17 @@ define i64 @test_load64(ptr %a) sanitize_hwaddress {
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; FASTPATH-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; FASTPATH-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; FASTPATH-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; FASTPATH-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; FASTPATH-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; FASTPATH-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; FASTPATH-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; FASTPATH:       8:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 3)
-; FASTPATH-NEXT:    br label [[TMP9]]
+; FASTPATH-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; FASTPATH-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; FASTPATH-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; FASTPATH-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; FASTPATH-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; FASTPATH:       9:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 3)
+; FASTPATH-NEXT:    br label [[TMP10]]
+; FASTPATH:       10:
 ; FASTPATH-NEXT:    [[B:%.*]] = load i64, ptr [[A]], align 8
 ; FASTPATH-NEXT:    ret i64 [[B]]
 ;
@@ -461,33 +471,34 @@ define i64 @test_load64(ptr %a) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2339", "{x0}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 7
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2339", "{x0}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 7
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i64, ptr [[A]], align 8
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret i64 [[B]]
 ;
@@ -506,33 +517,34 @@ define i64 @test_load64(ptr %a) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2339", "{x0}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 7
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2339", "{x0}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 7
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i64, ptr [[A]], align 8
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret i64 [[B]]
 ;
@@ -565,16 +577,17 @@ define i128 @test_load128(ptr %a) sanitize_hwaddress {
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; FASTPATH-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; FASTPATH-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; FASTPATH-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; FASTPATH-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; FASTPATH-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; FASTPATH-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; FASTPATH-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; FASTPATH:       8:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 4)
-; FASTPATH-NEXT:    br label [[TMP9]]
+; FASTPATH-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; FASTPATH-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; FASTPATH-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; FASTPATH-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; FASTPATH-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; FASTPATH:       9:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 4)
+; FASTPATH-NEXT:    br label [[TMP10]]
+; FASTPATH:       10:
 ; FASTPATH-NEXT:    [[B:%.*]] = load i128, ptr [[A]], align 16
 ; FASTPATH-NEXT:    ret i128 [[B]]
 ;
@@ -593,33 +606,34 @@ define i128 @test_load128(ptr %a) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2340", "{x0}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2340", "{x0}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[B:%.*]] = load i128, ptr [[A]], align 16
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret i128 [[B]]
 ;
@@ -638,33 +652,34 @@ define i128 @test_load128(ptr %a) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2340", "{x0}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2340", "{x0}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[B:%.*]] = load i128, ptr [[A]], align 16
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret i128 [[B]]
 ;
@@ -766,16 +781,17 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; FASTPATH-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; FASTPATH-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; FASTPATH-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; FASTPATH-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; FASTPATH-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; FASTPATH-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; FASTPATH-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; FASTPATH:       8:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 16)
-; FASTPATH-NEXT:    br label [[TMP9]]
+; FASTPATH-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; FASTPATH-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; FASTPATH-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; FASTPATH-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; FASTPATH-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; FASTPATH:       9:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 16)
+; FASTPATH-NEXT:    br label [[TMP10]]
+; FASTPATH:       10:
 ; FASTPATH-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret void
 ;
@@ -794,33 +810,34 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2352", "{x0}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 0
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2352", "{x0}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 0
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -839,33 +856,34 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2352", "{x0}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 0
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2352", "{x0}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 0
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -898,16 +916,17 @@ define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; FASTPATH-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; FASTPATH-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; FASTPATH-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; FASTPATH-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; FASTPATH-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; FASTPATH-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; FASTPATH-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; FASTPATH:       8:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 17)
-; FASTPATH-NEXT:    br label [[TMP9]]
+; FASTPATH-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; FASTPATH-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; FASTPATH-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; FASTPATH-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; FASTPATH-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; FASTPATH:       9:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 17)
+; FASTPATH-NEXT:    br label [[TMP10]]
+; FASTPATH:       10:
 ; FASTPATH-NEXT:    store i16 [[B]], ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret void
 ;
@@ -926,33 +945,34 @@ define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2353", "{x0}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2353", "{x0}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    store i16 [[B]], ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -971,33 +991,34 @@ define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2353", "{x0}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2353", "{x0}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    store i16 [[B]], ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1030,16 +1051,17 @@ define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; FASTPATH-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; FASTPATH-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; FASTPATH-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; FASTPATH-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; FASTPATH-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; FASTPATH-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; FASTPATH-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; FASTPATH:       8:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 18)
-; FASTPATH-NEXT:    br label [[TMP9]]
+; FASTPATH-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; FASTPATH-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; FASTPATH-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; FASTPATH-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; FASTPATH-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; FASTPATH:       9:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 18)
+; FASTPATH-NEXT:    br label [[TMP10]]
+; FASTPATH:       10:
 ; FASTPATH-NEXT:    store i32 [[B]], ptr [[A]], align 4
 ; FASTPATH-NEXT:    ret void
 ;
@@ -1058,33 +1080,34 @@ define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2354", "{x0}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 3
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2354", "{x0}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 3
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    store i32 [[B]], ptr [[A]], align 4
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1103,33 +1126,34 @@ define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2354", "{x0}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 3
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2354", "{x0}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 3
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    store i32 [[B]], ptr [[A]], align 4
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1162,16 +1186,17 @@ define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; FASTPATH-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; FASTPATH-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; FASTPATH-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; FASTPATH-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; FASTPATH-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; FASTPATH-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; FASTPATH-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; FASTPATH:       8:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 19)
-; FASTPATH-NEXT:    br label [[TMP9]]
+; FASTPATH-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; FASTPATH-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; FASTPATH-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; FASTPATH-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; FASTPATH-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; FASTPATH:       9:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 19)
+; FASTPATH-NEXT:    br label [[TMP10]]
+; FASTPATH:       10:
 ; FASTPATH-NEXT:    store i64 [[B]], ptr [[A]], align 8
 ; FASTPATH-NEXT:    ret void
 ;
@@ -1190,33 +1215,34 @@ define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2355", "{x0}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 7
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2355", "{x0}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 7
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    store i64 [[B]], ptr [[A]], align 8
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1235,33 +1261,34 @@ define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2355", "{x0}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 7
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2355", "{x0}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 7
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    store i64 [[B]], ptr [[A]], align 8
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
@@ -1294,16 +1321,17 @@ define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
 ; FASTPATH-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; FASTPATH-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; FASTPATH-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; FASTPATH-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; FASTPATH-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; FASTPATH-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; FASTPATH-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; FASTPATH-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; FASTPATH-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP9:%.*]], !prof [[PROF2]]
-; FASTPATH:       8:
-; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 20)
-; FASTPATH-NEXT:    br label [[TMP9]]
+; FASTPATH-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; FASTPATH-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; FASTPATH-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; FASTPATH-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; FASTPATH-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; FASTPATH-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; FASTPATH-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]], !prof [[PROF2]]
 ; FASTPATH:       9:
+; FASTPATH-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 20)
+; FASTPATH-NEXT:    br label [[TMP10]]
+; FASTPATH:       10:
 ; FASTPATH-NEXT:    store i128 [[B]], ptr [[A]], align 16
 ; FASTPATH-NEXT:    ret void
 ;
@@ -1322,33 +1350,34 @@ define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP4]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       8:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       10:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2356", "{x0}"(i64 [[TMP0]])
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       9:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       11:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       16:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-DYNAMIC-SHADOW:       21:
-; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    call void asm sideeffect "brk #2356", "{x0}"(i64 [[TMP0]])
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-DYNAMIC-SHADOW:       12:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-DYNAMIC-SHADOW:       17:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-DYNAMIC-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-DYNAMIC-SHADOW:       22:
+; RECOVER-DYNAMIC-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-DYNAMIC-SHADOW:       23:
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    store i128 [[B]], ptr [[A]], align 16
 ; RECOVER-DYNAMIC-SHADOW-NEXT:    ret void
 ;
@@ -1367,33 +1396,34 @@ define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = and i64 [[TMP0]], 72057594037927935
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = lshr i64 [[TMP3]], 4
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = load i8, ptr [[TMP5]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = icmp ne i8 [[TMP2]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP22:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       8:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP9:%.*]] = icmp ugt i8 [[TMP6]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       10:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2356", "{x0}"(i64 [[TMP0]])
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP21:%.*]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP23:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       9:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP12:%.*]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       11:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP12:%.*]] = and i64 [[TMP0]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP12]] to i8
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = add i8 [[TMP13]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = icmp uge i8 [[TMP14]], [[TMP6]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP15]], label [[TMP10]], label [[TMP16:%.*]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       16:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP17:%.*]] = or i64 [[TMP3]], 15
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = load i8, ptr [[TMP18]], align 1
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = icmp ne i8 [[TMP2]], [[TMP19]]
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP20]], label [[TMP10]], label [[TMP21]], !prof [[PROF2]]
-; RECOVER-ZERO-BASED-SHADOW:       21:
-; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    call void asm sideeffect "brk #2356", "{x0}"(i64 [[TMP0]])
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP22:%.*]]
+; RECOVER-ZERO-BASED-SHADOW:       12:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP16]], label [[TMP11]], label [[TMP17:%.*]], !prof [[PROF2]]
+; RECOVER-ZERO-BASED-SHADOW:       17:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br i1 [[TMP21]], label [[TMP11]], label [[TMP22]], !prof [[PROF2]]
 ; RECOVER-ZERO-BASED-SHADOW:       22:
+; RECOVER-ZERO-BASED-SHADOW-NEXT:    br label [[TMP23]]
+; RECOVER-ZERO-BASED-SHADOW:       23:
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    store i128 [[B]], ptr [[A]], align 16
 ; RECOVER-ZERO-BASED-SHADOW-NEXT:    ret void
 ;
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
index 9e9fceb5eb4721..c6394e29bc0454 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
@@ -22,7 +22,7 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
 ; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
 ; CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
 ; CHECK-NEXT:    [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; CHECK-NEXT:    [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT:    [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; CHECK-NEXT:    [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; CHECK-NEXT:    [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
 ; CHECK-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP6]], 44
@@ -42,48 +42,52 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
 ; CHECK-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; CHECK-NEXT:    [[TMP17:%.*]] = xor i64 [[TMP3]], 0
 ; CHECK-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935
-; CHECK-NEXT:    [[TMP20:%.*]] = shl i64 [[TMP17]], 56
-; CHECK-NEXT:    [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]
-; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
+; CHECK-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP18]], 8
+; CHECK-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 8
+; CHECK-NEXT:    [[TMP21:%.*]] = shl i64 [[TMP17]], 56
+; CHECK-NEXT:    [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
+; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
 ; CHECK-NEXT:    [[EXN_SLOT:%.*]] = alloca ptr, align 8
 ; CHECK-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
 ; CHECK-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr [[X]])
-; CHECK-NEXT:    [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8
-; CHECK-NEXT:    [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
-; CHECK-NEXT:    [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
-; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP23:%.*]] = trunc i64 [[TMP17]] to i8
+; CHECK-NEXT:    [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP25:%.*]] = shl i64 [[TMP24]], 8
+; CHECK-NEXT:    [[TMP26:%.*]] = ashr i64 [[TMP25]], 8
+; CHECK-NEXT:    [[TMP27:%.*]] = ashr i64 [[TMP26]], 4
+; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP27]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP28]], i8 [[TMP23]], i64 1, i1 false)
 ; CHECK-NEXT:    invoke void @mayFail(ptr [[X_HWASAN]])
-; CHECK-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
+; CHECK-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
 ; CHECK:       invoke.cont:
-; CHECK-NEXT:    [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
-; CHECK-NEXT:    [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
-; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP30:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP31:%.*]] = shl i64 [[TMP30]], 8
+; CHECK-NEXT:    [[TMP32:%.*]] = ashr i64 [[TMP31]], 8
+; CHECK-NEXT:    [[TMP33:%.*]] = ashr i64 [[TMP32]], 4
+; CHECK-NEXT:    [[TMP34:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP33]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 [[TMP29]], i64 1, i1 false)
 ; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
 ; CHECK-NEXT:    ret void
 ; CHECK:       lpad:
-; CHECK-NEXT:    [[TMP32:%.*]] = landingpad { ptr, i32 }
-; CHECK-NEXT:    cleanup
-; CHECK-NEXT:    [[TMP33:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
-; CHECK-NEXT:    call void @__hwasan_handle_vfork(i64 [[TMP33]])
-; CHECK-NEXT:    [[TMP34:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 0
+; CHECK-NEXT:    [[TMP35:%.*]] = landingpad { ptr, i32 }
+; CHECK-NEXT:            cleanup
+; CHECK-NEXT:    [[TMP36:%.*]] = call i64 @llvm.read_register.i64(metadata [[META3:![0-9]+]])
+; CHECK-NEXT:    call void @__hwasan_handle_vfork(i64 [[TMP36]])
+; CHECK-NEXT:    [[TMP37:%.*]] = extractvalue { ptr, i32 } [[TMP35]], 0
 ; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 19)
-; CHECK-NEXT:    store ptr [[TMP34]], ptr [[EXN_SLOT]], align 8
-; CHECK-NEXT:    [[TMP35:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 1
+; CHECK-NEXT:    store ptr [[TMP37]], ptr [[EXN_SLOT]], align 8
+; CHECK-NEXT:    [[TMP38:%.*]] = extractvalue { ptr, i32 } [[TMP35]], 1
 ; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 18)
-; CHECK-NEXT:    store i32 [[TMP35]], ptr [[EHSELECTOR_SLOT]], align 4
+; CHECK-NEXT:    store i32 [[TMP38]], ptr [[EHSELECTOR_SLOT]], align 4
 ; CHECK-NEXT:    call void @onExcept(ptr [[X_HWASAN]])
-; CHECK-NEXT:    [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP37:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP38:%.*]] = and i64 [[TMP37]], 72057594037927935
-; CHECK-NEXT:    [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
-; CHECK-NEXT:    [[TMP40:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP39]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[TMP36]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP39:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP40:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP41:%.*]] = shl i64 [[TMP40]], 8
+; CHECK-NEXT:    [[TMP42:%.*]] = ashr i64 [[TMP41]], 8
+; CHECK-NEXT:    [[TMP43:%.*]] = ashr i64 [[TMP42]], 4
+; CHECK-NEXT:    [[TMP44:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP43]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP44]], i8 [[TMP39]], i64 1, i1 false)
 ; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
 ; CHECK-NEXT:    br label [[EH_RESUME:%.*]]
 ; CHECK:       eh.resume:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/globals-access.ll b/llvm/test/Instrumentation/HWAddressSanitizer/globals-access.ll
index f9040afd1c0166..57ffefb1359ccc 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/globals-access.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/globals-access.ll
@@ -27,16 +27,17 @@ define dso_local noundef i32 @_Z3tmpv() sanitize_hwaddress {
 ; CHECK-NEXT:    [[TMP2:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
 ; CHECK-NEXT:    [[TMP3:%.*]] = lshr i64 ptrtoint (ptr @x to i64), 56
 ; CHECK-NEXT:    [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
-; CHECK-NEXT:    [[TMP5:%.*]] = and i64 ptrtoint (ptr @x to i64), 72057594037927935
-; CHECK-NEXT:    [[TMP6:%.*]] = lshr i64 [[TMP5]], 4
+; CHECK-NEXT:    [[TMP5:%.*]] = shl i64 ptrtoint (ptr @x to i64), 8
+; CHECK-NEXT:    [[TMP10:%.*]] = ashr i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP6:%.*]] = ashr i64 [[TMP10]], 4
 ; CHECK-NEXT:    [[TMP7:%.*]] = getelementptr i8, ptr [[TMP2]], i64 [[TMP6]]
 ; CHECK-NEXT:    [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
 ; CHECK-NEXT:    [[TMP9:%.*]] = icmp ne i8 [[TMP4]], [[TMP8]]
-; CHECK-NEXT:    br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2:![0-9]+]]
-; CHECK:       10:
+; CHECK-NEXT:    br i1 [[TMP9]], label [[TMP13:%.*]], label [[TMP11:%.*]], !prof [[PROF3:![0-9]+]]
+; CHECK:       11:
 ; CHECK-NEXT:    call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP2]], ptr @x, i32 2)
 ; CHECK-NEXT:    br label [[TMP11]]
-; CHECK:       11:
+; CHECK:       12:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @x, align 4
 ; CHECK-NEXT:    ret i32 [[TMP0]]
 ;
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
index 7652587ce4ec09..ee49d4a686f3d6 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
@@ -21,24 +21,27 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; CHECK-NEXT:    [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
 ; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP5:%.*]] = or i64 [[TMP4]], -72057594037927936
-; CHECK-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP3]], 56
-; CHECK-NEXT:    [[TMP7:%.*]] = or i64 [[TMP6]], 72057594037927935
-; CHECK-NEXT:    [[TMP8:%.*]] = and i64 [[TMP5]], [[TMP7]]
-; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
-; CHECK-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP3]] to i8
-; CHECK-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP11:%.*]] = or i64 [[TMP10]], -72057594037927936
-; CHECK-NEXT:    [[TMP12:%.*]] = lshr i64 [[TMP11]], 4
-; CHECK-NEXT:    [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP13]], i8 [[TMP9]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 8
+; CHECK-NEXT:    [[TMP6:%.*]] = ashr i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP3]], 56
+; CHECK-NEXT:    [[TMP8:%.*]] = or i64 [[TMP7]], 72057594037927935
+; CHECK-NEXT:    [[TMP9:%.*]] = and i64 [[TMP6]], [[TMP8]]
+; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr
+; CHECK-NEXT:    [[TMP10:%.*]] = trunc i64 [[TMP3]] to i8
+; CHECK-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP12:%.*]] = shl i64 [[TMP11]], 8
+; CHECK-NEXT:    [[TMP13:%.*]] = ashr i64 [[TMP12]], 8
+; CHECK-NEXT:    [[TMP14:%.*]] = ashr i64 [[TMP13]], 4
+; CHECK-NEXT:    [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP15]], i8 [[TMP10]], i64 1, i1 false)
 ; CHECK-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]])
-; CHECK-NEXT:    [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP16:%.*]] = or i64 [[TMP15]], -72057594037927936
-; CHECK-NEXT:    [[TMP17:%.*]] = lshr i64 [[TMP16]], 4
-; CHECK-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[TMP14]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP18:%.*]] = shl i64 [[TMP17]], 8
+; CHECK-NEXT:    [[TMP19:%.*]] = ashr i64 [[TMP18]], 8
+; CHECK-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 4
+; CHECK-NEXT:    [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP21]], i8 [[TMP16]], i64 1, i1 false)
 ; CHECK-NEXT:    ret void
 ;
 
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/kernel.ll b/llvm/test/Instrumentation/HWAddressSanitizer/kernel.ll
index 3d89f5d87abbab..da3f02d139b864 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/kernel.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/kernel.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
 ; Test KHWASan instrumentation.
 ;
 ; RUN: opt < %s -passes=hwasan -hwasan-kernel=1 -hwasan-recover=1 -S | FileCheck %s --allow-empty --check-prefixes=INIT
@@ -10,38 +11,153 @@ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
 target triple = "aarch64--linux-android"
 
 define i8 @test_load(ptr %a) sanitize_hwaddress {
-; CHECK-LABEL: @test_load(
-; OFFSET: %[[SHADOW:[^ ]*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 12345678 to ptr))
-; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
-; CHECK: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
-; CHECK: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
-; CHECK: %[[C:[^ ]*]] = or i64 %[[A]], -72057594037927936
-; CHECK: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
+; INIT-LABEL: define i8 @test_load(
+; INIT-SAME: ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
+; INIT-NEXT:  [[ENTRY:.*:]]
+; INIT-NEXT:    [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
+; INIT-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
+; INIT-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
+; INIT-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
+; INIT-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; INIT-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; INIT-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; INIT-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; INIT-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; INIT-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; INIT-NEXT:    [[TMP9:%.*]] = icmp ne i8 [[TMP2]], -1
+; INIT-NEXT:    [[TMP10:%.*]] = and i1 [[TMP8]], [[TMP9]]
+; INIT-NEXT:    br i1 [[TMP10]], label %[[BB11:.*]], label %[[BB25:.*]], !prof [[PROF1:![0-9]+]]
+; INIT:       [[BB11]]:
+; INIT-NEXT:    [[TMP12:%.*]] = icmp ugt i8 [[TMP7]], 15
+; INIT-NEXT:    br i1 [[TMP12]], label %[[BB13:.*]], label %[[BB14:.*]], !prof [[PROF1]]
+; INIT:       [[BB13]]:
+; INIT-NEXT:    call void asm sideeffect "brk #2336", "{x0}"(i64 [[TMP0]])
+; INIT-NEXT:    br label %[[BB24:.*]]
+; INIT:       [[BB14]]:
+; INIT-NEXT:    [[TMP15:%.*]] = and i64 [[TMP0]], 15
+; INIT-NEXT:    [[TMP16:%.*]] = trunc i64 [[TMP15]] to i8
+; INIT-NEXT:    [[TMP17:%.*]] = add i8 [[TMP16]], 0
+; INIT-NEXT:    [[TMP18:%.*]] = icmp uge i8 [[TMP17]], [[TMP7]]
+; INIT-NEXT:    br i1 [[TMP18]], label %[[BB13]], label %[[BB19:.*]], !prof [[PROF1]]
+; INIT:       [[BB19]]:
+; INIT-NEXT:    [[TMP20:%.*]] = or i64 [[TMP0]], 15
+; INIT-NEXT:    [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
+; INIT-NEXT:    [[TMP22:%.*]] = load i8, ptr [[TMP21]], align 1
+; INIT-NEXT:    [[TMP23:%.*]] = icmp ne i8 [[TMP2]], [[TMP22]]
+; INIT-NEXT:    br i1 [[TMP23]], label %[[BB13]], label %[[BB24]], !prof [[PROF1]]
+; INIT:       [[BB24]]:
+; INIT-NEXT:    br label %[[BB25]]
+; INIT:       [[BB25]]:
+; INIT-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
+; INIT-NEXT:    ret i8 [[B]]
+;
+; OFFSET-LABEL: define i8 @test_load(
+; OFFSET-SAME: ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
+; OFFSET-NEXT:  [[ENTRY:.*:]]
+; OFFSET-NEXT:    [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 12345678 to ptr))
+; OFFSET-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
+; OFFSET-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
+; OFFSET-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
+; OFFSET-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; OFFSET-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; OFFSET-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; OFFSET-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
+; OFFSET-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; OFFSET-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; OFFSET-NEXT:    [[TMP9:%.*]] = icmp ne i8 [[TMP2]], -1
+; OFFSET-NEXT:    [[TMP10:%.*]] = and i1 [[TMP8]], [[TMP9]]
+; OFFSET-NEXT:    br i1 [[TMP10]], label %[[BB11:.*]], label %[[BB25:.*]], !prof [[PROF1:![0-9]+]]
+; OFFSET:       [[BB11]]:
+; OFFSET-NEXT:    [[TMP12:%.*]] = icmp ugt i8 [[TMP7]], 15
+; OFFSET-NEXT:    br i1 [[TMP12]], label %[[BB13:.*]], label %[[BB14:.*]], !prof [[PROF1]]
+; OFFSET:       [[BB13]]:
+; OFFSET-NEXT:    call void asm sideeffect "brk #2336", "{x0}"(i64 [[TMP0]])
+; OFFSET-NEXT:    br label %[[BB24:.*]]
+; OFFSET:       [[BB14]]:
+; OFFSET-NEXT:    [[TMP15:%.*]] = and i64 [[TMP0]], 15
+; OFFSET-NEXT:    [[TMP16:%.*]] = trunc i64 [[TMP15]] to i8
+; OFFSET-NEXT:    [[TMP17:%.*]] = add i8 [[TMP16]], 0
+; OFFSET-NEXT:    [[TMP18:%.*]] = icmp uge i8 [[TMP17]], [[TMP7]]
+; OFFSET-NEXT:    br i1 [[TMP18]], label %[[BB13]], label %[[BB19:.*]], !prof [[PROF1]]
+; OFFSET:       [[BB19]]:
+; OFFSET-NEXT:    [[TMP20:%.*]] = or i64 [[TMP0]], 15
+; OFFSET-NEXT:    [[TMP21:%.*]] = inttoptr i64 [[TMP20]] to ptr
+; OFFSET-NEXT:    [[TMP22:%.*]] = load i8, ptr [[TMP21]], align 1
+; OFFSET-NEXT:    [[TMP23:%.*]] = icmp ne i8 [[TMP2]], [[TMP22]]
+; OFFSET-NEXT:    br i1 [[TMP23]], label %[[BB13]], label %[[BB24]], !prof [[PROF1]]
+; OFFSET:       [[BB24]]:
+; OFFSET-NEXT:    br label %[[BB25]]
+; OFFSET:       [[BB25]]:
+; OFFSET-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
+; OFFSET-NEXT:    ret i8 [[B]]
+;
+; NO-MATCH-ALL-LABEL: define i8 @test_load(
+; NO-MATCH-ALL-SAME: ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
+; NO-MATCH-ALL-NEXT:  [[ENTRY:.*:]]
+; NO-MATCH-ALL-NEXT:    [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
+; NO-MATCH-ALL-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
+; NO-MATCH-ALL-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 56
+; NO-MATCH-ALL-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
+; NO-MATCH-ALL-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], 8
+; NO-MATCH-ALL-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 8
+; NO-MATCH-ALL-NEXT:    [[TMP5:%.*]] = ashr i64 [[TMP4]], 4
+; NO-MATCH-ALL-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
+; NO-MATCH-ALL-NEXT:    [[TMP7:%.*]] = load i8, ptr [[TMP6]], align 1
+; NO-MATCH-ALL-NEXT:    [[TMP8:%.*]] = icmp ne i8 [[TMP2]], [[TMP7]]
+; NO-MATCH-ALL-NEXT:    br i1 [[TMP8]], label %[[BB9:.*]], label %[[BB23:.*]], !prof [[PROF1:![0-9]+]]
+; NO-MATCH-ALL:       [[BB9]]:
+; NO-MATCH-ALL-NEXT:    [[TMP10:%.*]] = icmp ugt i8 [[TMP7]], 15
+; NO-MATCH-ALL-NEXT:    br i1 [[TMP10]], label %[[BB11:.*]], label %[[BB12:.*]], !prof [[PROF1]]
+; NO-MATCH-ALL:       [[BB11]]:
+; NO-MATCH-ALL-NEXT:    call void asm sideeffect "brk #2336", "{x0}"(i64 [[TMP0]])
+; NO-MATCH-ALL-NEXT:    br label %[[BB22:.*]]
+; NO-MATCH-ALL:       [[BB12]]:
+; NO-MATCH-ALL-NEXT:    [[TMP13:%.*]] = and i64 [[TMP0]], 15
+; NO-MATCH-ALL-NEXT:    [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8
+; NO-MATCH-ALL-NEXT:    [[TMP15:%.*]] = add i8 [[TMP14]], 0
+; NO-MATCH-ALL-NEXT:    [[TMP16:%.*]] = icmp uge i8 [[TMP15]], [[TMP7]]
+; NO-MATCH-ALL-NEXT:    br i1 [[TMP16]], label %[[BB11]], label %[[BB17:.*]], !prof [[PROF1]]
+; NO-MATCH-ALL:       [[BB17]]:
+; NO-MATCH-ALL-NEXT:    [[TMP18:%.*]] = or i64 [[TMP0]], 15
+; NO-MATCH-ALL-NEXT:    [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; NO-MATCH-ALL-NEXT:    [[TMP20:%.*]] = load i8, ptr [[TMP19]], align 1
+; NO-MATCH-ALL-NEXT:    [[TMP21:%.*]] = icmp ne i8 [[TMP2]], [[TMP20]]
+; NO-MATCH-ALL-NEXT:    br i1 [[TMP21]], label %[[BB11]], label %[[BB22]], !prof [[PROF1]]
+; NO-MATCH-ALL:       [[BB22]]:
+; NO-MATCH-ALL-NEXT:    br label %[[BB23]]
+; NO-MATCH-ALL:       [[BB23]]:
+; NO-MATCH-ALL-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
+; NO-MATCH-ALL-NEXT:    ret i8 [[B]]
+;
+; OUTLINE-LABEL: define i8 @test_load(
+; OUTLINE-SAME: ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
+; OUTLINE-NEXT:  [[ENTRY:.*:]]
+; OUTLINE-NEXT:    [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 12345678 to ptr))
+; OUTLINE-NEXT:    call void @llvm.hwasan.check.memaccess(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 67043360)
+; OUTLINE-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
+; OUTLINE-NEXT:    ret i8 [[B]]
+;
 
-; NOOFFSET: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
 
-; OFFSET: %[[E:[^ ]*]] = getelementptr i8, ptr %[[SHADOW]], i64 %[[D]]
 
-; CHECK: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
-; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
 
-; MATCH-ALL: %[[G:[^ ]*]] = icmp ne i8 %[[PTRTAG]], -1
-; MATCH-ALL: %[[H:[^ ]*]] = and i1 %[[F]], %[[G]]
-; MATCH-ALL: br i1 %[[H]], label {{.*}}, label {{.*}}, !prof {{.*}}
 
-; NO-MATCH-ALL: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
 
-; CHECK: call void asm sideeffect "brk #2336", "{x0}"(i64 %[[A]])
-; CHECK: br label
 
-; CHECK: %[[G:[^ ]*]] = load i8, ptr %a, align 4
-; CHECK: ret i8 %[[G]]
 
-; OUTLINE: %[[SHADOW:[^ ]*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 12345678 to ptr))
-; OUTLINE: call void @llvm.hwasan.check.memaccess(ptr %[[SHADOW]], ptr %a, i32 67043360)
 entry:
   %b = load i8, ptr %a, align 4
   ret i8 %b
 }
 
-; INIT-NOT: call void @__hwasan_init
+;.
+; INIT: [[PROF1]] = !{!"branch_weights", i32 1, i32 1048575}
+;.
+; OFFSET: [[PROF1]] = !{!"branch_weights", i32 1, i32 1048575}
+;.
+; NO-MATCH-ALL: [[PROF1]] = !{!"branch_weights", i32 1, i32 1048575}
+;.
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
+; MATCH-ALL: {{.*}}
+; NOOFFSET: {{.*}}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
index 73fc077c956242..79bbe5883118f3 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
@@ -99,7 +99,7 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
 ; CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
 ; CHECK-NEXT:    [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; CHECK-NEXT:    [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT:    [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; CHECK-NEXT:    [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; CHECK-NEXT:    [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
 ; CHECK-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP6]], 44
@@ -119,23 +119,26 @@ define void @test_alloca() sanitize_hwaddress {
 ; CHECK-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; CHECK-NEXT:    [[TMP17:%.*]] = xor i64 [[TMP3]], 0
 ; CHECK-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935
-; CHECK-NEXT:    [[TMP20:%.*]] = shl i64 [[TMP17]], 56
-; CHECK-NEXT:    [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]
-; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
-; CHECK-NEXT:    [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8
-; CHECK-NEXT:    [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
-; CHECK-NEXT:    [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
-; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP18]], 8
+; CHECK-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 8
+; CHECK-NEXT:    [[TMP21:%.*]] = shl i64 [[TMP17]], 56
+; CHECK-NEXT:    [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
+; CHECK-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
+; CHECK-NEXT:    [[TMP23:%.*]] = trunc i64 [[TMP17]] to i8
+; CHECK-NEXT:    [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP25:%.*]] = shl i64 [[TMP24]], 8
+; CHECK-NEXT:    [[TMP26:%.*]] = ashr i64 [[TMP25]], 8
+; CHECK-NEXT:    [[TMP27:%.*]] = ashr i64 [[TMP26]], 4
+; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP27]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP28]], i8 [[TMP23]], i64 1, i1 false)
 ; CHECK-NEXT:    call void @use(ptr [[X_HWASAN]])
-; CHECK-NEXT:    [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT:    [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
-; CHECK-NEXT:    [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
-; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP30:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT:    [[TMP31:%.*]] = shl i64 [[TMP30]], 8
+; CHECK-NEXT:    [[TMP32:%.*]] = ashr i64 [[TMP31]], 8
+; CHECK-NEXT:    [[TMP33:%.*]] = ashr i64 [[TMP32]], 4
+; CHECK-NEXT:    [[TMP34:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP33]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 [[TMP29]], i64 1, i1 false)
 ; CHECK-NEXT:    ret void
 ;
 ; NOIFUNC-TLS-HISTORY-LABEL: define void @test_alloca
@@ -145,7 +148,7 @@ define void @test_alloca() sanitize_hwaddress {
 ; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
 ; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
 ; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
 ; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP6]], 44
@@ -165,23 +168,26 @@ define void @test_alloca() sanitize_hwaddress {
 ; NOIFUNC-TLS-HISTORY-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP17:%.*]] = xor i64 [[TMP3]], 0
 ; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP20:%.*]] = shl i64 [[TMP17]], 56
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]
-; NOIFUNC-TLS-HISTORY-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]
-; NOIFUNC-TLS-HISTORY-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false)
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP18]], 8
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 8
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP21:%.*]] = shl i64 [[TMP17]], 56
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
+; NOIFUNC-TLS-HISTORY-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP23:%.*]] = trunc i64 [[TMP17]] to i8
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP25:%.*]] = shl i64 [[TMP24]], 8
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP26:%.*]] = ashr i64 [[TMP25]], 8
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP27:%.*]] = ashr i64 [[TMP26]], 4
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP28:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP27]]
+; NOIFUNC-TLS-HISTORY-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP28]], i8 [[TMP23]], i64 1, i1 false)
 ; NOIFUNC-TLS-HISTORY-NEXT:    call void @use(ptr [[X_HWASAN]])
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
-; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]
-; NOIFUNC-TLS-HISTORY-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP29:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP30:%.*]] = ptrtoint ptr [[X]] to i64
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP31:%.*]] = shl i64 [[TMP30]], 8
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP32:%.*]] = ashr i64 [[TMP31]], 8
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP33:%.*]] = ashr i64 [[TMP32]], 4
+; NOIFUNC-TLS-HISTORY-NEXT:    [[TMP34:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP33]]
+; NOIFUNC-TLS-HISTORY-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 [[TMP29]], i64 1, i1 false)
 ; NOIFUNC-TLS-HISTORY-NEXT:    ret void
 ;
 ; NOIFUNC-TLS-NOHISTORY-LABEL: define void @test_alloca
@@ -196,23 +202,26 @@ define void @test_alloca() sanitize_hwaddress {
 ; NOIFUNC-TLS-NOHISTORY-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
 ; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP3]], 56
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP11:%.*]] = lshr i64 [[TMP10]], 4
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]]
-; NOIFUNC-TLS-NOHISTORY-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP12]], i8 [[TMP8]], i64 1, i1 false)
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 8
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP6:%.*]] = ashr i64 [[TMP5]], 8
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP3]], 56
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]]
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP3]] to i8
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP11:%.*]] = shl i64 [[TMP10]], 8
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP11]], 8
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP13:%.*]] = ashr i64 [[TMP12]], 4
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP14:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP13]]
+; NOIFUNC-TLS-NOHISTORY-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP14]], i8 [[TMP9]], i64 1, i1 false)
 ; NOIFUNC-TLS-NOHISTORY-NEXT:    call void @use(ptr [[X_HWASAN]])
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP13:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP15:%.*]] = and i64 [[TMP14]], 72057594037927935
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP16:%.*]] = lshr i64 [[TMP15]], 4
-; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP17:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP16]]
-; NOIFUNC-TLS-NOHISTORY-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP17]], i8 [[TMP13]], i64 1, i1 false)
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP17:%.*]] = shl i64 [[TMP16]], 8
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP18:%.*]] = ashr i64 [[TMP17]], 8
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP19:%.*]] = ashr i64 [[TMP18]], 4
+; NOIFUNC-TLS-NOHISTORY-NEXT:    [[TMP20:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP19]]
+; NOIFUNC-TLS-NOHISTORY-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP20]], i8 [[TMP15]], i64 1, i1 false)
 ; NOIFUNC-TLS-NOHISTORY-NEXT:    ret void
 ;
 ; NOIFUNC-NOTLS-LABEL: define void @test_alloca
@@ -227,23 +236,26 @@ define void @test_alloca() sanitize_hwaddress {
 ; NOIFUNC-NOTLS-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; NOIFUNC-NOTLS-NEXT:    [[TMP4:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
 ; NOIFUNC-NOTLS-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64
-; NOIFUNC-NOTLS-NEXT:    [[TMP6:%.*]] = and i64 [[TMP5]], 72057594037927935
-; NOIFUNC-NOTLS-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP4]], 56
-; NOIFUNC-NOTLS-NEXT:    [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]]
-; NOIFUNC-NOTLS-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
-; NOIFUNC-NOTLS-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8
-; NOIFUNC-NOTLS-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64
-; NOIFUNC-NOTLS-NEXT:    [[TMP11:%.*]] = and i64 [[TMP10]], 72057594037927935
-; NOIFUNC-NOTLS-NEXT:    [[TMP12:%.*]] = lshr i64 [[TMP11]], 4
-; NOIFUNC-NOTLS-NEXT:    [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP12]]
-; NOIFUNC-NOTLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP13]], i8 [[TMP9]], i64 1, i1 false)
+; NOIFUNC-NOTLS-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP5]], 8
+; NOIFUNC-NOTLS-NEXT:    [[TMP7:%.*]] = ashr i64 [[TMP6]], 8
+; NOIFUNC-NOTLS-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP4]], 56
+; NOIFUNC-NOTLS-NEXT:    [[TMP9:%.*]] = or i64 [[TMP7]], [[TMP8]]
+; NOIFUNC-NOTLS-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr
+; NOIFUNC-NOTLS-NEXT:    [[TMP10:%.*]] = trunc i64 [[TMP4]] to i8
+; NOIFUNC-NOTLS-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[X]] to i64
+; NOIFUNC-NOTLS-NEXT:    [[TMP12:%.*]] = shl i64 [[TMP11]], 8
+; NOIFUNC-NOTLS-NEXT:    [[TMP13:%.*]] = ashr i64 [[TMP12]], 8
+; NOIFUNC-NOTLS-NEXT:    [[TMP14:%.*]] = ashr i64 [[TMP13]], 4
+; NOIFUNC-NOTLS-NEXT:    [[TMP15:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP14]]
+; NOIFUNC-NOTLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP15]], i8 [[TMP10]], i64 1, i1 false)
 ; NOIFUNC-NOTLS-NEXT:    call void @use(ptr [[X_HWASAN]])
-; NOIFUNC-NOTLS-NEXT:    [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; NOIFUNC-NOTLS-NEXT:    [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64
-; NOIFUNC-NOTLS-NEXT:    [[TMP16:%.*]] = and i64 [[TMP15]], 72057594037927935
-; NOIFUNC-NOTLS-NEXT:    [[TMP17:%.*]] = lshr i64 [[TMP16]], 4
-; NOIFUNC-NOTLS-NEXT:    [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP17]]
-; NOIFUNC-NOTLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[TMP14]], i64 1, i1 false)
+; NOIFUNC-NOTLS-NEXT:    [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; NOIFUNC-NOTLS-NEXT:    [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
+; NOIFUNC-NOTLS-NEXT:    [[TMP18:%.*]] = shl i64 [[TMP17]], 8
+; NOIFUNC-NOTLS-NEXT:    [[TMP19:%.*]] = ashr i64 [[TMP18]], 8
+; NOIFUNC-NOTLS-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 4
+; NOIFUNC-NOTLS-NEXT:    [[TMP21:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP20]]
+; NOIFUNC-NOTLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP21]], i8 [[TMP16]], i64 1, i1 false)
 ; NOIFUNC-NOTLS-NEXT:    ret void
 ;
 ; IFUNC-NOTLS-LABEL: define void @test_alloca
@@ -258,23 +270,26 @@ define void @test_alloca() sanitize_hwaddress {
 ; IFUNC-NOTLS-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; IFUNC-NOTLS-NEXT:    [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
 ; IFUNC-NOTLS-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64
-; IFUNC-NOTLS-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935
-; IFUNC-NOTLS-NEXT:    [[TMP6:%.*]] = shl i64 [[TMP3]], 56
-; IFUNC-NOTLS-NEXT:    [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; IFUNC-NOTLS-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr
-; IFUNC-NOTLS-NEXT:    [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8
-; IFUNC-NOTLS-NEXT:    [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64
-; IFUNC-NOTLS-NEXT:    [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935
-; IFUNC-NOTLS-NEXT:    [[TMP11:%.*]] = lshr i64 [[TMP10]], 4
-; IFUNC-NOTLS-NEXT:    [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]]
-; IFUNC-NOTLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP12]], i8 [[TMP8]], i64 1, i1 false)
+; IFUNC-NOTLS-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 8
+; IFUNC-NOTLS-NEXT:    [[TMP6:%.*]] = ashr i64 [[TMP5]], 8
+; IFUNC-NOTLS-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP3]], 56
+; IFUNC-NOTLS-NEXT:    [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]]
+; IFUNC-NOTLS-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
+; IFUNC-NOTLS-NEXT:    [[TMP9:%.*]] = trunc i64 [[TMP3]] to i8
+; IFUNC-NOTLS-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64
+; IFUNC-NOTLS-NEXT:    [[TMP11:%.*]] = shl i64 [[TMP10]], 8
+; IFUNC-NOTLS-NEXT:    [[TMP12:%.*]] = ashr i64 [[TMP11]], 8
+; IFUNC-NOTLS-NEXT:    [[TMP13:%.*]] = ashr i64 [[TMP12]], 4
+; IFUNC-NOTLS-NEXT:    [[TMP14:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP13]]
+; IFUNC-NOTLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP14]], i8 [[TMP9]], i64 1, i1 false)
 ; IFUNC-NOTLS-NEXT:    call void @use(ptr [[X_HWASAN]])
-; IFUNC-NOTLS-NEXT:    [[TMP13:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; IFUNC-NOTLS-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64
-; IFUNC-NOTLS-NEXT:    [[TMP15:%.*]] = and i64 [[TMP14]], 72057594037927935
-; IFUNC-NOTLS-NEXT:    [[TMP16:%.*]] = lshr i64 [[TMP15]], 4
-; IFUNC-NOTLS-NEXT:    [[TMP17:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP16]]
-; IFUNC-NOTLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP17]], i8 [[TMP13]], i64 1, i1 false)
+; IFUNC-NOTLS-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; IFUNC-NOTLS-NEXT:    [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64
+; IFUNC-NOTLS-NEXT:    [[TMP17:%.*]] = shl i64 [[TMP16]], 8
+; IFUNC-NOTLS-NEXT:    [[TMP18:%.*]] = ashr i64 [[TMP17]], 8
+; IFUNC-NOTLS-NEXT:    [[TMP19:%.*]] = ashr i64 [[TMP18]], 4
+; IFUNC-NOTLS-NEXT:    [[TMP20:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP19]]
+; IFUNC-NOTLS-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP20]], i8 [[TMP15]], i64 1, i1 false)
 ; IFUNC-NOTLS-NEXT:    ret void
 ;
 ; FUCHSIA-LABEL: define void @test_alloca
@@ -283,7 +298,7 @@ define void @test_alloca() sanitize_hwaddress {
 ; FUCHSIA-NEXT:    [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
 ; FUCHSIA-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
 ; FUCHSIA-NEXT:    [[TMP1:%.*]] = ashr i64 [[TMP0]], 3
-; FUCHSIA-NEXT:    [[TMP2:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; FUCHSIA-NEXT:    [[TMP2:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; FUCHSIA-NEXT:    [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; FUCHSIA-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
 ; FUCHSIA-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 44
@@ -300,33 +315,36 @@ define void @test_alloca() sanitize_hwaddress {
 ; FUCHSIA-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; FUCHSIA-NEXT:    [[TMP13:%.*]] = xor i64 [[TMP1]], 0
 ; FUCHSIA-NEXT:    [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-NEXT:    [[TMP15:%.*]] = and i64 [[TMP14]], 72057594037927935
-; FUCHSIA-NEXT:    [[TMP16:%.*]] = shl i64 [[TMP13]], 56
-; FUCHSIA-NEXT:    [[TMP17:%.*]] = or i64 [[TMP15]], [[TMP16]]
-; FUCHSIA-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; FUCHSIA-NEXT:    [[TMP18:%.*]] = trunc i64 [[TMP13]] to i8
-; FUCHSIA-NEXT:    [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-NEXT:    [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
-; FUCHSIA-NEXT:    [[TMP21:%.*]] = lshr i64 [[TMP20]], 4
-; FUCHSIA-NEXT:    [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
-; FUCHSIA-NEXT:    [[TMP23:%.*]] = getelementptr i8, ptr [[TMP22]], i32 0
-; FUCHSIA-NEXT:    store i8 4, ptr [[TMP23]], align 1
-; FUCHSIA-NEXT:    [[TMP24:%.*]] = getelementptr i8, ptr [[X]], i32 15
-; FUCHSIA-NEXT:    store i8 [[TMP18]], ptr [[TMP24]], align 1
+; FUCHSIA-NEXT:    [[TMP15:%.*]] = shl i64 [[TMP14]], 8
+; FUCHSIA-NEXT:    [[TMP16:%.*]] = ashr i64 [[TMP15]], 8
+; FUCHSIA-NEXT:    [[TMP17:%.*]] = shl i64 [[TMP13]], 56
+; FUCHSIA-NEXT:    [[TMP18:%.*]] = or i64 [[TMP16]], [[TMP17]]
+; FUCHSIA-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; FUCHSIA-NEXT:    [[TMP19:%.*]] = trunc i64 [[TMP13]] to i8
+; FUCHSIA-NEXT:    [[TMP20:%.*]] = ptrtoint ptr [[X]] to i64
+; FUCHSIA-NEXT:    [[TMP21:%.*]] = shl i64 [[TMP20]], 8
+; FUCHSIA-NEXT:    [[TMP22:%.*]] = ashr i64 [[TMP21]], 8
+; FUCHSIA-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 4
+; FUCHSIA-NEXT:    [[TMP24:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; FUCHSIA-NEXT:    [[TMP25:%.*]] = getelementptr i8, ptr [[TMP24]], i32 0
+; FUCHSIA-NEXT:    store i8 4, ptr [[TMP25]], align 1
+; FUCHSIA-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[X]], i32 15
+; FUCHSIA-NEXT:    store i8 [[TMP19]], ptr [[TMP26]], align 1
 ; FUCHSIA-NEXT:    call void @use(ptr [[X_HWASAN]])
-; FUCHSIA-NEXT:    [[TMP25:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; FUCHSIA-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; FUCHSIA-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; FUCHSIA-NEXT:    [[TMP29:%.*]] = inttoptr i64 [[TMP28]] to ptr
-; FUCHSIA-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; FUCHSIA-NEXT:    [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; FUCHSIA-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
+; FUCHSIA-NEXT:    [[TMP29:%.*]] = shl i64 [[TMP28]], 8
+; FUCHSIA-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 8
+; FUCHSIA-NEXT:    [[TMP31:%.*]] = ashr i64 [[TMP30]], 4
+; FUCHSIA-NEXT:    [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr
+; FUCHSIA-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP27]], i64 1, i1 false)
 ; FUCHSIA-NEXT:    ret void
 ;
 ; FUCHSIA-LIBCALL-LABEL: define void @test_alloca
 ; FUCHSIA-LIBCALL-SAME: () #[[ATTR0]] personality ptr @__hwasan_personality_thunk {
 ; FUCHSIA-LIBCALL-NEXT:  entry:
 ; FUCHSIA-LIBCALL-NEXT:    [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
-; FUCHSIA-LIBCALL-NEXT:    [[TMP0:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; FUCHSIA-LIBCALL-NEXT:    [[TMP0:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; FUCHSIA-LIBCALL-NEXT:    [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; FUCHSIA-LIBCALL-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
 ; FUCHSIA-LIBCALL-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP2]], 44
@@ -338,26 +356,29 @@ define void @test_alloca() sanitize_hwaddress {
 ; FUCHSIA-LIBCALL-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; FUCHSIA-LIBCALL-NEXT:    [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
 ; FUCHSIA-LIBCALL-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-LIBCALL-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], 72057594037927935
-; FUCHSIA-LIBCALL-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 56
-; FUCHSIA-LIBCALL-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; FUCHSIA-LIBCALL-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; FUCHSIA-LIBCALL-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; FUCHSIA-LIBCALL-NEXT:    [[TMP12:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-LIBCALL-NEXT:    [[TMP13:%.*]] = and i64 [[TMP12]], 72057594037927935
-; FUCHSIA-LIBCALL-NEXT:    [[TMP14:%.*]] = lshr i64 [[TMP13]], 4
-; FUCHSIA-LIBCALL-NEXT:    [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr
-; FUCHSIA-LIBCALL-NEXT:    [[TMP16:%.*]] = getelementptr i8, ptr [[TMP15]], i32 0
-; FUCHSIA-LIBCALL-NEXT:    store i8 4, ptr [[TMP16]], align 1
-; FUCHSIA-LIBCALL-NEXT:    [[TMP17:%.*]] = getelementptr i8, ptr [[X]], i32 15
-; FUCHSIA-LIBCALL-NEXT:    store i8 [[TMP11]], ptr [[TMP17]], align 1
+; FUCHSIA-LIBCALL-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 8
+; FUCHSIA-LIBCALL-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 8
+; FUCHSIA-LIBCALL-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 56
+; FUCHSIA-LIBCALL-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; FUCHSIA-LIBCALL-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; FUCHSIA-LIBCALL-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
+; FUCHSIA-LIBCALL-NEXT:    [[TMP13:%.*]] = ptrtoint ptr [[X]] to i64
+; FUCHSIA-LIBCALL-NEXT:    [[TMP14:%.*]] = shl i64 [[TMP13]], 8
+; FUCHSIA-LIBCALL-NEXT:    [[TMP15:%.*]] = ashr i64 [[TMP14]], 8
+; FUCHSIA-LIBCALL-NEXT:    [[TMP16:%.*]] = ashr i64 [[TMP15]], 4
+; FUCHSIA-LIBCALL-NEXT:    [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
+; FUCHSIA-LIBCALL-NEXT:    [[TMP18:%.*]] = getelementptr i8, ptr [[TMP17]], i32 0
+; FUCHSIA-LIBCALL-NEXT:    store i8 4, ptr [[TMP18]], align 1
+; FUCHSIA-LIBCALL-NEXT:    [[TMP19:%.*]] = getelementptr i8, ptr [[X]], i32 15
+; FUCHSIA-LIBCALL-NEXT:    store i8 [[TMP12]], ptr [[TMP19]], align 1
 ; FUCHSIA-LIBCALL-NEXT:    call void @use(ptr [[X_HWASAN]])
-; FUCHSIA-LIBCALL-NEXT:    [[TMP18:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; FUCHSIA-LIBCALL-NEXT:    [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-LIBCALL-NEXT:    [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
-; FUCHSIA-LIBCALL-NEXT:    [[TMP21:%.*]] = lshr i64 [[TMP20]], 4
-; FUCHSIA-LIBCALL-NEXT:    [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
-; FUCHSIA-LIBCALL-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP22]], i8 [[TMP18]], i64 1, i1 false)
+; FUCHSIA-LIBCALL-NEXT:    [[TMP20:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; FUCHSIA-LIBCALL-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[X]] to i64
+; FUCHSIA-LIBCALL-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; FUCHSIA-LIBCALL-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; FUCHSIA-LIBCALL-NEXT:    [[TMP24:%.*]] = ashr i64 [[TMP23]], 4
+; FUCHSIA-LIBCALL-NEXT:    [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr
+; FUCHSIA-LIBCALL-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP25]], i8 [[TMP20]], i64 1, i1 false)
 ; FUCHSIA-LIBCALL-NEXT:    ret void
 ;
 entry:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
index 62fd7a16715693..552d4e567338e4 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
@@ -16,7 +16,7 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
 ; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
 ; CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
 ; CHECK-NEXT:    [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; CHECK-NEXT:    [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT:    [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; CHECK-NEXT:    [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; CHECK-NEXT:    [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
 ; CHECK-NEXT:    [[TMP7:%.*]] = shl i64 [[TMP6]], 44
@@ -36,16 +36,18 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
 ; CHECK-NEXT:    [[BUF:%.*]] = alloca [4096 x i8], align 16
 ; CHECK-NEXT:    [[TMP17:%.*]] = xor i64 [[TMP3]], 0
 ; CHECK-NEXT:    [[TMP18:%.*]] = ptrtoint ptr [[BUF]] to i64
-; CHECK-NEXT:    [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935
-; CHECK-NEXT:    [[TMP20:%.*]] = shl i64 [[TMP17]], 56
-; CHECK-NEXT:    [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]
-; CHECK-NEXT:    [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
-; CHECK-NEXT:    [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8
-; CHECK-NEXT:    [[TMP23:%.*]] = ptrtoint ptr [[BUF]] to i64
-; CHECK-NEXT:    [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
-; CHECK-NEXT:    [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
-; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 256, i1 false)
+; CHECK-NEXT:    [[TMP19:%.*]] = shl i64 [[TMP18]], 8
+; CHECK-NEXT:    [[TMP20:%.*]] = ashr i64 [[TMP19]], 8
+; CHECK-NEXT:    [[TMP21:%.*]] = shl i64 [[TMP17]], 56
+; CHECK-NEXT:    [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
+; CHECK-NEXT:    [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
+; CHECK-NEXT:    [[TMP23:%.*]] = trunc i64 [[TMP17]] to i8
+; CHECK-NEXT:    [[TMP24:%.*]] = ptrtoint ptr [[BUF]] to i64
+; CHECK-NEXT:    [[TMP25:%.*]] = shl i64 [[TMP24]], 8
+; CHECK-NEXT:    [[TMP26:%.*]] = ashr i64 [[TMP25]], 8
+; CHECK-NEXT:    [[TMP27:%.*]] = ashr i64 [[TMP26]], 4
+; CHECK-NEXT:    [[TMP28:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP27]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP28]], i8 [[TMP23]], i64 256, i1 false)
 ; CHECK-NEXT:    [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf)
 ; CHECK-NEXT:    switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [
 ; CHECK-NEXT:      i32 1, label [[RETURN:%.*]]
@@ -59,12 +61,13 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
 ; CHECK-NEXT:    br label [[RETURN]]
 ; CHECK:       return:
 ; CHECK-NEXT:    [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ]
-; CHECK-NEXT:    [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[BUF]] to i64
-; CHECK-NEXT:    [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
-; CHECK-NEXT:    [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
-; CHECK-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]
-; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 256, i1 false)
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; CHECK-NEXT:    [[TMP30:%.*]] = ptrtoint ptr [[BUF]] to i64
+; CHECK-NEXT:    [[TMP31:%.*]] = shl i64 [[TMP30]], 8
+; CHECK-NEXT:    [[TMP32:%.*]] = ashr i64 [[TMP31]], 8
+; CHECK-NEXT:    [[TMP33:%.*]] = ashr i64 [[TMP32]], 4
+; CHECK-NEXT:    [[TMP34:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP33]]
+; CHECK-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 [[TMP29]], i64 256, i1 false)
 ; CHECK-NEXT:    ret i1 [[RETVAL_0]]
 ;
 entry:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
index 643b2a8c274cf1..b7d5f783daee2e 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
@@ -34,21 +34,22 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
 ; X86-SCOPE-NEXT:    [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
 ; X86-SCOPE-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
 ; X86-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-SCOPE-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; X86-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-SCOPE-NEXT:    br label [[TMP11:%.*]]
-; X86-SCOPE:       11:
+; X86-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 7
+; X86-SCOPE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; X86-SCOPE-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 57
+; X86-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; X86-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; X86-SCOPE-NEXT:    br label [[TMP12:%.*]]
+; X86-SCOPE:       12:
 ; X86-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
-; X86-SCOPE-NEXT:    [[TMP13:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT:    [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16)
+; X86-SCOPE-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP6]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP13]], i64 16)
+; X86-SCOPE-NEXT:    [[TMP14:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP15]], i64 16)
 ; X86-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT:    br i1 [[TMP13]], label [[TMP15:%.*]], label [[TMP11]]
-; X86-SCOPE:       15:
+; X86-SCOPE-NEXT:    br i1 [[TMP14]], label [[TMP16:%.*]], label [[TMP12]]
+; X86-SCOPE:       16:
 ; X86-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; X86-SCOPE-NEXT:    ret i32 0
 ;
@@ -62,20 +63,21 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
 ; X86-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
 ; X86-NOSCOPE-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
 ; X86-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-NOSCOPE-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; X86-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-NOSCOPE-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-NOSCOPE-NEXT:    br label [[TMP12:%.*]]
-; X86-NOSCOPE:       12:
-; X86-NOSCOPE-NEXT:    [[TMP13:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP12]]
-; X86-NOSCOPE:       14:
+; X86-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 7
+; X86-NOSCOPE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; X86-NOSCOPE-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 57
+; X86-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; X86-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; X86-NOSCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
+; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
+; X86-NOSCOPE-NEXT:    br label [[TMP13:%.*]]
+; X86-NOSCOPE:       13:
+; X86-NOSCOPE-NEXT:    [[TMP14:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT:    br i1 [[TMP14]], label [[TMP15:%.*]], label [[TMP13]]
+; X86-NOSCOPE:       15:
 ; X86-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP15]], i64 16)
+; X86-NOSCOPE-NEXT:    [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16)
 ; X86-NOSCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SCOPE-LABEL: @standard_lifetime(
@@ -83,7 +85,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; AARCH64-SCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -104,29 +106,32 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SCOPE-NEXT:    br label [[TMP25:%.*]]
-; AARCH64-SCOPE:       25:
+; AARCH64-SCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SCOPE-NEXT:    br label [[TMP26:%.*]]
+; AARCH64-SCOPE:       26:
 ; AARCH64-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[TMP26]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT:    [[TMP31:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT:    [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT:    [[TMP27:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP29:%.*]] = shl i64 [[TMP28]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP31:%.*]] = ashr i64 [[TMP30]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP27]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT:    [[TMP33:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP36:%.*]] = shl i64 [[TMP35]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP37:%.*]] = ashr i64 [[TMP36]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP38:%.*]] = ashr i64 [[TMP37]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP34]], i64 1, i1 false)
 ; AARCH64-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT:    br i1 [[TMP31]], label [[TMP37:%.*]], label [[TMP25]]
-; AARCH64-SCOPE:       37:
+; AARCH64-SCOPE-NEXT:    br i1 [[TMP33]], label [[TMP40:%.*]], label [[TMP26]]
+; AARCH64-SCOPE:       40:
 ; AARCH64-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; AARCH64-SCOPE-NEXT:    ret i32 0
 ;
@@ -135,7 +140,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-NOSCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-NOSCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-NOSCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; AARCH64-NOSCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -156,28 +161,31 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-NOSCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-NOSCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-NOSCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-NOSCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-NOSCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
-; AARCH64-NOSCOPE-NEXT:    br label [[TMP30:%.*]]
-; AARCH64-NOSCOPE:       30:
-; AARCH64-NOSCOPE-NEXT:    [[TMP31:%.*]] = tail call i1 (...) @cond()
-; AARCH64-NOSCOPE-NEXT:    br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
+; AARCH64-NOSCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-NOSCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-NOSCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-NOSCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP26]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT:    br label [[TMP32:%.*]]
 ; AARCH64-NOSCOPE:       32:
+; AARCH64-NOSCOPE-NEXT:    [[TMP33:%.*]] = tail call i1 (...) @cond()
+; AARCH64-NOSCOPE-NEXT:    br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP32]]
+; AARCH64-NOSCOPE:       34:
 ; AARCH64-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT:    [[TMP33:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT:    [[TMP34:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
-; AARCH64-NOSCOPE-NEXT:    [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]
-; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP33]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT:    [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-NOSCOPE-NEXT:    [[TMP36:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT:    [[TMP37:%.*]] = shl i64 [[TMP36]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP38:%.*]] = ashr i64 [[TMP37]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP39:%.*]] = ashr i64 [[TMP38]], 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP40:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP39]]
+; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[TMP35]], i64 1, i1 false)
 ; AARCH64-NOSCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime(
@@ -185,7 +193,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -206,32 +214,35 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT:    br label [[TMP25:%.*]]
-; AARCH64-SHORT-SCOPE:       25:
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT:    br label [[TMP26:%.*]]
+; AARCH64-SHORT-SCOPE:       26:
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]]
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP30]], i32 0
-; AARCH64-SHORT-SCOPE-NEXT:    store i8 1, ptr [[TMP31]], align 1
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT:    store i8 [[TMP26]], ptr [[TMP32]], align 1
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP33:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP27:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP29:%.*]] = shl i64 [[TMP28]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP31:%.*]] = ashr i64 [[TMP30]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP32]], i32 0
+; AARCH64-SHORT-SCOPE-NEXT:    store i8 1, ptr [[TMP33]], align 1
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP34:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT:    store i8 [[TMP27]], ptr [[TMP34]], align 1
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP35:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP37:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP38:%.*]] = shl i64 [[TMP37]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP39:%.*]] = ashr i64 [[TMP38]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP40:%.*]] = ashr i64 [[TMP39]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP41:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP40]]
+; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP41]], i8 [[TMP36]], i64 1, i1 false)
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT:    br i1 [[TMP33]], label [[TMP39:%.*]], label [[TMP25]]
-; AARCH64-SHORT-SCOPE:       39:
+; AARCH64-SHORT-SCOPE-NEXT:    br i1 [[TMP35]], label [[TMP42:%.*]], label [[TMP26]]
+; AARCH64-SHORT-SCOPE:       42:
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; AARCH64-SHORT-SCOPE-NEXT:    ret i32 0
 ;
@@ -240,7 +251,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -261,31 +272,34 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 [[TMP25]], ptr [[TMP31]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT:    br label [[TMP32:%.*]]
-; AARCH64-SHORT-NOSCOPE:       32:
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP33:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-NOSCOPE-NEXT:    br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP32]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP31]], i32 0
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 1, ptr [[TMP32]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 [[TMP26]], ptr [[TMP33]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT:    br label [[TMP34:%.*]]
 ; AARCH64-SHORT-NOSCOPE:       34:
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP35:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-NOSCOPE-NEXT:    br i1 [[TMP35]], label [[TMP36:%.*]], label [[TMP34]]
+; AARCH64-SHORT-NOSCOPE:       36:
 ; AARCH64-SHORT-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP36:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP35]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP37:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP38:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP39:%.*]] = shl i64 [[TMP38]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP40:%.*]] = ashr i64 [[TMP39]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP41:%.*]] = ashr i64 [[TMP40]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP37]], i64 1, i1 false)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    ret i32 0
 ;
   %1 = alloca i8, align 1
@@ -315,21 +329,22 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
 ; X86-SCOPE-NEXT:    [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
 ; X86-SCOPE-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
 ; X86-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-SCOPE-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; X86-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-SCOPE-NEXT:    br label [[TMP11:%.*]]
-; X86-SCOPE:       11:
+; X86-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 7
+; X86-SCOPE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; X86-SCOPE-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 57
+; X86-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; X86-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; X86-SCOPE-NEXT:    br label [[TMP12:%.*]]
+; X86-SCOPE:       12:
 ; X86-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
-; X86-SCOPE-NEXT:    [[TMP13:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT:    [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16)
+; X86-SCOPE-NEXT:    [[TMP13:%.*]] = trunc i64 [[TMP6]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP13]], i64 16)
+; X86-SCOPE-NEXT:    [[TMP14:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP15]], i64 16)
 ; X86-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT:    br i1 [[TMP13]], label [[TMP15:%.*]], label [[TMP11]]
-; X86-SCOPE:       15:
+; X86-SCOPE-NEXT:    br i1 [[TMP14]], label [[TMP16:%.*]], label [[TMP12]]
+; X86-SCOPE:       16:
 ; X86-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; X86-SCOPE-NEXT:    ret i32 0
 ;
@@ -343,20 +358,21 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
 ; X86-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
 ; X86-NOSCOPE-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
 ; X86-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-NOSCOPE-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; X86-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-NOSCOPE-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-NOSCOPE-NEXT:    br label [[TMP12:%.*]]
-; X86-NOSCOPE:       12:
-; X86-NOSCOPE-NEXT:    [[TMP13:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP12]]
-; X86-NOSCOPE:       14:
+; X86-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 7
+; X86-NOSCOPE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; X86-NOSCOPE-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 57
+; X86-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; X86-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; X86-NOSCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
+; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
+; X86-NOSCOPE-NEXT:    br label [[TMP13:%.*]]
+; X86-NOSCOPE:       13:
+; X86-NOSCOPE-NEXT:    [[TMP14:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT:    br i1 [[TMP14]], label [[TMP15:%.*]], label [[TMP13]]
+; X86-NOSCOPE:       15:
 ; X86-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP15]], i64 16)
+; X86-NOSCOPE-NEXT:    [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16)
 ; X86-NOSCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SCOPE-LABEL: @standard_lifetime_optnone(
@@ -364,7 +380,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
 ; AARCH64-SCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -385,29 +401,32 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
 ; AARCH64-SCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SCOPE-NEXT:    br label [[TMP25:%.*]]
-; AARCH64-SCOPE:       25:
+; AARCH64-SCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SCOPE-NEXT:    br label [[TMP26:%.*]]
+; AARCH64-SCOPE:       26:
 ; AARCH64-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[TMP26]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT:    [[TMP31:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT:    [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT:    [[TMP27:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP29:%.*]] = shl i64 [[TMP28]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP31:%.*]] = ashr i64 [[TMP30]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP27]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT:    [[TMP33:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP36:%.*]] = shl i64 [[TMP35]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP37:%.*]] = ashr i64 [[TMP36]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP38:%.*]] = ashr i64 [[TMP37]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP34]], i64 1, i1 false)
 ; AARCH64-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT:    br i1 [[TMP31]], label [[TMP37:%.*]], label [[TMP25]]
-; AARCH64-SCOPE:       37:
+; AARCH64-SCOPE-NEXT:    br i1 [[TMP33]], label [[TMP40:%.*]], label [[TMP26]]
+; AARCH64-SCOPE:       40:
 ; AARCH64-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; AARCH64-SCOPE-NEXT:    ret i32 0
 ;
@@ -416,7 +435,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
 ; AARCH64-NOSCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-NOSCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-NOSCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-NOSCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -437,28 +456,31 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
 ; AARCH64-NOSCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-NOSCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-NOSCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-NOSCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-NOSCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
-; AARCH64-NOSCOPE-NEXT:    br label [[TMP30:%.*]]
-; AARCH64-NOSCOPE:       30:
-; AARCH64-NOSCOPE-NEXT:    [[TMP31:%.*]] = tail call i1 (...) @cond()
-; AARCH64-NOSCOPE-NEXT:    br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
+; AARCH64-NOSCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-NOSCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-NOSCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-NOSCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP26]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT:    br label [[TMP32:%.*]]
 ; AARCH64-NOSCOPE:       32:
+; AARCH64-NOSCOPE-NEXT:    [[TMP33:%.*]] = tail call i1 (...) @cond()
+; AARCH64-NOSCOPE-NEXT:    br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP32]]
+; AARCH64-NOSCOPE:       34:
 ; AARCH64-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT:    [[TMP33:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT:    [[TMP34:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
-; AARCH64-NOSCOPE-NEXT:    [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]
-; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP33]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT:    [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-NOSCOPE-NEXT:    [[TMP36:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT:    [[TMP37:%.*]] = shl i64 [[TMP36]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP38:%.*]] = ashr i64 [[TMP37]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP39:%.*]] = ashr i64 [[TMP38]], 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP40:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP39]]
+; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[TMP35]], i64 1, i1 false)
 ; AARCH64-NOSCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime_optnone(
@@ -466,7 +488,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -487,32 +509,35 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT:    br label [[TMP25:%.*]]
-; AARCH64-SHORT-SCOPE:       25:
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT:    br label [[TMP26:%.*]]
+; AARCH64-SHORT-SCOPE:       26:
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]]
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP30]], i32 0
-; AARCH64-SHORT-SCOPE-NEXT:    store i8 1, ptr [[TMP31]], align 1
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT:    store i8 [[TMP26]], ptr [[TMP32]], align 1
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP33:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP27:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP29:%.*]] = shl i64 [[TMP28]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP31:%.*]] = ashr i64 [[TMP30]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP32]], i32 0
+; AARCH64-SHORT-SCOPE-NEXT:    store i8 1, ptr [[TMP33]], align 1
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP34:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT:    store i8 [[TMP27]], ptr [[TMP34]], align 1
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP35:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP37:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP38:%.*]] = shl i64 [[TMP37]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP39:%.*]] = ashr i64 [[TMP38]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP40:%.*]] = ashr i64 [[TMP39]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP41:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP40]]
+; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP41]], i8 [[TMP36]], i64 1, i1 false)
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT:    br i1 [[TMP33]], label [[TMP39:%.*]], label [[TMP25]]
-; AARCH64-SHORT-SCOPE:       39:
+; AARCH64-SHORT-SCOPE-NEXT:    br i1 [[TMP35]], label [[TMP42:%.*]], label [[TMP26]]
+; AARCH64-SHORT-SCOPE:       42:
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; AARCH64-SHORT-SCOPE-NEXT:    ret i32 0
 ;
@@ -521,7 +546,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -542,31 +567,34 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 [[TMP25]], ptr [[TMP31]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT:    br label [[TMP32:%.*]]
-; AARCH64-SHORT-NOSCOPE:       32:
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP33:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-NOSCOPE-NEXT:    br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP32]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP31]], i32 0
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 1, ptr [[TMP32]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 [[TMP26]], ptr [[TMP33]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT:    br label [[TMP34:%.*]]
 ; AARCH64-SHORT-NOSCOPE:       34:
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP35:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-NOSCOPE-NEXT:    br i1 [[TMP35]], label [[TMP36:%.*]], label [[TMP34]]
+; AARCH64-SHORT-NOSCOPE:       36:
 ; AARCH64-SHORT-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP36:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP35]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP37:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP38:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP39:%.*]] = shl i64 [[TMP38]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP40:%.*]] = ashr i64 [[TMP39]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP41:%.*]] = ashr i64 [[TMP40]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP37]], i64 1, i1 false)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    ret i32 0
 ;
   %1 = alloca i8, align 1
@@ -596,16 +624,17 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
 ; X86-SCOPE-NEXT:    [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
 ; X86-SCOPE-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
 ; X86-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-SCOPE-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; X86-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-SCOPE-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
+; X86-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 7
+; X86-SCOPE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; X86-SCOPE-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 57
+; X86-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; X86-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; X86-SCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
 ; X86-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; X86-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-SCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
+; X86-SCOPE-NEXT:    [[TMP13:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP13]], i64 16)
 ; X86-SCOPE-NEXT:    ret i32 0
 ;
 ; X86-NOSCOPE-LABEL: @multiple_lifetimes(
@@ -618,16 +647,17 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
 ; X86-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
 ; X86-NOSCOPE-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
 ; X86-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-NOSCOPE-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; X86-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-NOSCOPE-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
+; X86-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 7
+; X86-NOSCOPE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; X86-NOSCOPE-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 57
+; X86-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; X86-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; X86-NOSCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
+; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
 ; X86-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; X86-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
+; X86-NOSCOPE-NEXT:    [[TMP13:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP13]], i64 16)
 ; X86-NOSCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SCOPE-LABEL: @multiple_lifetimes(
@@ -635,7 +665,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -656,24 +686,27 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP26]], i64 1, i1 false)
 ; AARCH64-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; AARCH64-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SCOPE-NEXT:    [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP31:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP32:%.*]] = and i64 [[TMP31]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 [[TMP30]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT:    [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP34:%.*]] = shl i64 [[TMP33]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP35:%.*]] = ashr i64 [[TMP34]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP36:%.*]] = ashr i64 [[TMP35]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP32]], i64 1, i1 false)
 ; AARCH64-SCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-NOSCOPE-LABEL: @multiple_lifetimes(
@@ -681,7 +714,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-NOSCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-NOSCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-NOSCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-NOSCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -702,24 +735,27 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-NOSCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-NOSCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-NOSCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-NOSCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-NOSCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-NOSCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-NOSCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-NOSCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP26]], i64 1, i1 false)
 ; AARCH64-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; AARCH64-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT:    [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT:    [[TMP31:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP32:%.*]] = and i64 [[TMP31]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
-; AARCH64-NOSCOPE-NEXT:    [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
-; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 [[TMP30]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT:    [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-NOSCOPE-NEXT:    [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT:    [[TMP34:%.*]] = shl i64 [[TMP33]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP35:%.*]] = ashr i64 [[TMP34]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP36:%.*]] = ashr i64 [[TMP35]], 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]
+; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP32]], i64 1, i1 false)
 ; AARCH64-NOSCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SHORT-SCOPE-LABEL: @multiple_lifetimes(
@@ -727,7 +763,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -748,27 +784,30 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
-; AARCH64-SHORT-SCOPE-NEXT:    store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT:    store i8 [[TMP25]], ptr [[TMP31]], align 1
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP31]], i32 0
+; AARCH64-SHORT-SCOPE-NEXT:    store i8 1, ptr [[TMP32]], align 1
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT:    store i8 [[TMP26]], ptr [[TMP33]], align 1
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP36:%.*]] = shl i64 [[TMP35]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP37:%.*]] = ashr i64 [[TMP36]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP38:%.*]] = ashr i64 [[TMP37]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
+; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP34]], i64 1, i1 false)
 ; AARCH64-SHORT-SCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SHORT-NOSCOPE-LABEL: @multiple_lifetimes(
@@ -776,7 +815,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -797,27 +836,30 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 [[TMP25]], ptr [[TMP31]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP31]], i32 0
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 1, ptr [[TMP32]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 [[TMP26]], ptr [[TMP33]], align 1
 ; AARCH64-SHORT-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
 ; AARCH64-SHORT-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP36:%.*]] = shl i64 [[TMP35]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP37:%.*]] = ashr i64 [[TMP36]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP38:%.*]] = ashr i64 [[TMP37]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP34]], i64 1, i1 false)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    ret i32 0
 ;
   %1 = alloca i8, align 1
@@ -843,23 +885,24 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
 ; X86-SCOPE-NEXT:    [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
 ; X86-SCOPE-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
 ; X86-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-SCOPE-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; X86-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
+; X86-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 7
+; X86-SCOPE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; X86-SCOPE-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 57
+; X86-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; X86-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
 ; X86-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-SCOPE-NEXT:    [[TMP12:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT:    br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]]
-; X86-SCOPE:       13:
+; X86-SCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
+; X86-SCOPE-NEXT:    [[TMP13:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP16:%.*]]
+; X86-SCOPE:       14:
 ; X86-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-SCOPE-NEXT:    [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16)
+; X86-SCOPE-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP15]], i64 16)
 ; X86-SCOPE-NEXT:    ret i32 0
-; X86-SCOPE:       15:
-; X86-SCOPE-NEXT:    [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16)
+; X86-SCOPE:       16:
+; X86-SCOPE-NEXT:    [[TMP17:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP17]], i64 16)
 ; X86-SCOPE-NEXT:    ret i32 0
 ;
 ; X86-NOSCOPE-LABEL: @unreachable_exit(
@@ -872,22 +915,23 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
 ; X86-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
 ; X86-NOSCOPE-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
 ; X86-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-NOSCOPE-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; X86-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-NOSCOPE-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-NOSCOPE-NEXT:    [[TMP12:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT:    br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]]
-; X86-NOSCOPE:       13:
+; X86-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 7
+; X86-NOSCOPE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; X86-NOSCOPE-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 57
+; X86-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; X86-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; X86-NOSCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
+; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
+; X86-NOSCOPE-NEXT:    [[TMP13:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP16:%.*]]
+; X86-NOSCOPE:       14:
 ; X86-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT:    [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16)
+; X86-NOSCOPE-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP15]], i64 16)
 ; X86-NOSCOPE-NEXT:    ret i32 0
-; X86-NOSCOPE:       15:
-; X86-NOSCOPE-NEXT:    [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16)
+; X86-NOSCOPE:       16:
+; X86-NOSCOPE-NEXT:    [[TMP17:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP17]], i64 16)
 ; X86-NOSCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SCOPE-LABEL: @unreachable_exit(
@@ -895,7 +939,7 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -916,35 +960,39 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
+; AARCH64-SCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
 ; AARCH64-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT:    [[TMP30:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT:    br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP37:%.*]]
-; AARCH64-SCOPE:       31:
+; AARCH64-SCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP26]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT:    [[TMP32:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SCOPE-NEXT:    br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP40:%.*]]
+; AARCH64-SCOPE:       33:
 ; AARCH64-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SCOPE-NEXT:    [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP36:%.*]] = shl i64 [[TMP35]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP37:%.*]] = ashr i64 [[TMP36]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP38:%.*]] = ashr i64 [[TMP37]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP34]], i64 1, i1 false)
 ; AARCH64-SCOPE-NEXT:    ret i32 0
-; AARCH64-SCOPE:       37:
-; AARCH64-SCOPE-NEXT:    [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP39:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
+; AARCH64-SCOPE:       40:
+; AARCH64-SCOPE-NEXT:    [[TMP41:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP42:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP43:%.*]] = shl i64 [[TMP42]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP44:%.*]] = ashr i64 [[TMP43]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP45:%.*]] = ashr i64 [[TMP44]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP46:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP45]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP46]], i8 [[TMP41]], i64 1, i1 false)
 ; AARCH64-SCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-NOSCOPE-LABEL: @unreachable_exit(
@@ -952,7 +1000,7 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-NOSCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-NOSCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-NOSCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-NOSCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -973,34 +1021,38 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-NOSCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-NOSCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-NOSCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-NOSCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-NOSCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
-; AARCH64-NOSCOPE-NEXT:    [[TMP30:%.*]] = tail call i1 (...) @cond()
-; AARCH64-NOSCOPE-NEXT:    br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP37:%.*]]
-; AARCH64-NOSCOPE:       31:
+; AARCH64-NOSCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-NOSCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-NOSCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-NOSCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP26]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT:    [[TMP32:%.*]] = tail call i1 (...) @cond()
+; AARCH64-NOSCOPE-NEXT:    br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP40:%.*]]
+; AARCH64-NOSCOPE:       33:
 ; AARCH64-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT:    [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT:    [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-NOSCOPE-NEXT:    [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-NOSCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT:    [[TMP36:%.*]] = shl i64 [[TMP35]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP37:%.*]] = ashr i64 [[TMP36]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP38:%.*]] = ashr i64 [[TMP37]], 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
+; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP34]], i64 1, i1 false)
 ; AARCH64-NOSCOPE-NEXT:    ret i32 0
-; AARCH64-NOSCOPE:       37:
-; AARCH64-NOSCOPE-NEXT:    [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT:    [[TMP39:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
-; AARCH64-NOSCOPE-NEXT:    [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
-; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
+; AARCH64-NOSCOPE:       40:
+; AARCH64-NOSCOPE-NEXT:    [[TMP41:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-NOSCOPE-NEXT:    [[TMP42:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT:    [[TMP43:%.*]] = shl i64 [[TMP42]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP44:%.*]] = ashr i64 [[TMP43]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP45:%.*]] = ashr i64 [[TMP44]], 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP46:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP45]]
+; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP46]], i8 [[TMP41]], i64 1, i1 false)
 ; AARCH64-NOSCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SHORT-SCOPE-LABEL: @unreachable_exit(
@@ -1008,7 +1060,7 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -1029,38 +1081,42 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
-; AARCH64-SHORT-SCOPE-NEXT:    store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT:    store i8 [[TMP25]], ptr [[TMP31]], align 1
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP32:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT:    br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP39:%.*]]
-; AARCH64-SHORT-SCOPE:       33:
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP31]], i32 0
+; AARCH64-SHORT-SCOPE-NEXT:    store i8 1, ptr [[TMP32]], align 1
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT:    store i8 [[TMP26]], ptr [[TMP33]], align 1
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP34:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-SCOPE-NEXT:    br i1 [[TMP34]], label [[TMP35:%.*]], label [[TMP42:%.*]]
+; AARCH64-SHORT-SCOPE:       35:
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP37:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP38:%.*]] = shl i64 [[TMP37]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP39:%.*]] = ashr i64 [[TMP38]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP40:%.*]] = ashr i64 [[TMP39]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP41:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP40]]
+; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP41]], i8 [[TMP36]], i64 1, i1 false)
 ; AARCH64-SHORT-SCOPE-NEXT:    ret i32 0
-; AARCH64-SHORT-SCOPE:       39:
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP40:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP41:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP42:%.*]] = and i64 [[TMP41]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP43:%.*]] = lshr i64 [[TMP42]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP44:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP43]]
-; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP44]], i8 [[TMP40]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE:       42:
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP43:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP44:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP45:%.*]] = shl i64 [[TMP44]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP46:%.*]] = ashr i64 [[TMP45]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP47:%.*]] = ashr i64 [[TMP46]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP48:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP47]]
+; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP48]], i8 [[TMP43]], i64 1, i1 false)
 ; AARCH64-SHORT-SCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SHORT-NOSCOPE-LABEL: @unreachable_exit(
@@ -1068,7 +1124,7 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -1089,37 +1145,41 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 [[TMP25]], ptr [[TMP31]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP32:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-NOSCOPE-NEXT:    br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP39:%.*]]
-; AARCH64-SHORT-NOSCOPE:       33:
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP31]], i32 0
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 1, ptr [[TMP32]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 [[TMP26]], ptr [[TMP33]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP34:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-NOSCOPE-NEXT:    br i1 [[TMP34]], label [[TMP35:%.*]], label [[TMP42:%.*]]
+; AARCH64-SHORT-NOSCOPE:       35:
 ; AARCH64-SHORT-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP37:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP38:%.*]] = shl i64 [[TMP37]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP39:%.*]] = ashr i64 [[TMP38]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP40:%.*]] = ashr i64 [[TMP39]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP41:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP40]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP41]], i8 [[TMP36]], i64 1, i1 false)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    ret i32 0
-; AARCH64-SHORT-NOSCOPE:       39:
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP40:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP41:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP42:%.*]] = and i64 [[TMP41]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP43:%.*]] = lshr i64 [[TMP42]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP44:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP43]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP44]], i8 [[TMP40]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE:       42:
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP43:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP44:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP45:%.*]] = shl i64 [[TMP44]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP46:%.*]] = ashr i64 [[TMP45]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP47:%.*]] = ashr i64 [[TMP46]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP48:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP47]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP48]], i8 [[TMP43]], i64 1, i1 false)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    ret i32 0
 ;
   %1 = alloca i8, align 1
@@ -1147,27 +1207,28 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
 ; X86-SCOPE-NEXT:    [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
 ; X86-SCOPE-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
 ; X86-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-SCOPE-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-SCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-SCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; X86-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
+; X86-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 7
+; X86-SCOPE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; X86-SCOPE-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 57
+; X86-SCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; X86-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
 ; X86-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-SCOPE-NEXT:    [[TMP12:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT:    br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]]
-; X86-SCOPE:       13:
+; X86-SCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
+; X86-SCOPE-NEXT:    [[TMP13:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP16:%.*]]
+; X86-SCOPE:       14:
 ; X86-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-SCOPE-NEXT:    [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16)
+; X86-SCOPE-NEXT:    [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP15]], i64 16)
 ; X86-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT:    br label [[TMP17:%.*]]
-; X86-SCOPE:       15:
-; X86-SCOPE-NEXT:    [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16)
+; X86-SCOPE-NEXT:    br label [[TMP18:%.*]]
+; X86-SCOPE:       16:
+; X86-SCOPE-NEXT:    [[TMP17:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-SCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP17]], i64 16)
 ; X86-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT:    br label [[TMP17]]
-; X86-SCOPE:       17:
+; X86-SCOPE-NEXT:    br label [[TMP18]]
+; X86-SCOPE:       18:
 ; X86-SCOPE-NEXT:    ret i32 0
 ;
 ; X86-NOSCOPE-LABEL: @diamond_lifetime(
@@ -1180,22 +1241,23 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
 ; X86-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
 ; X86-NOSCOPE-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
 ; X86-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-NOSCOPE-NEXT:    [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-NOSCOPE-NEXT:    [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-NOSCOPE-NEXT:    [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; X86-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-NOSCOPE-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-NOSCOPE-NEXT:    [[TMP12:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT:    br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP14:%.*]]
-; X86-NOSCOPE:       13:
-; X86-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT:    br label [[TMP15:%.*]]
+; X86-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 7
+; X86-NOSCOPE-NEXT:    [[TMP9:%.*]] = ashr i64 [[TMP8]], 7
+; X86-NOSCOPE-NEXT:    [[TMP10:%.*]] = shl i64 [[TMP6]], 57
+; X86-NOSCOPE-NEXT:    [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; X86-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; X86-NOSCOPE-NEXT:    [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
+; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
+; X86-NOSCOPE-NEXT:    [[TMP13:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]]
 ; X86-NOSCOPE:       14:
-; X86-NOSCOPE-NEXT:    br label [[TMP15]]
+; X86-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; X86-NOSCOPE-NEXT:    br label [[TMP16:%.*]]
 ; X86-NOSCOPE:       15:
-; X86-NOSCOPE-NEXT:    [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16)
+; X86-NOSCOPE-NEXT:    br label [[TMP16]]
+; X86-NOSCOPE:       16:
+; X86-NOSCOPE-NEXT:    [[TMP17:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; X86-NOSCOPE-NEXT:    call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP17]], i64 16)
 ; X86-NOSCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SCOPE-LABEL: @diamond_lifetime(
@@ -1203,7 +1265,7 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -1224,39 +1286,43 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
+; AARCH64-SCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
 ; AARCH64-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT:    [[TMP30:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT:    br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP37:%.*]]
-; AARCH64-SCOPE:       31:
+; AARCH64-SCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP26]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT:    [[TMP32:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SCOPE-NEXT:    br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP40:%.*]]
+; AARCH64-SCOPE:       33:
 ; AARCH64-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SCOPE-NEXT:    [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP36:%.*]] = shl i64 [[TMP35]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP37:%.*]] = ashr i64 [[TMP36]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP38:%.*]] = ashr i64 [[TMP37]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP34]], i64 1, i1 false)
 ; AARCH64-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT:    br label [[TMP43:%.*]]
-; AARCH64-SCOPE:       37:
-; AARCH64-SCOPE-NEXT:    [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT:    [[TMP39:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT:    [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
-; AARCH64-SCOPE-NEXT:    [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
-; AARCH64-SCOPE-NEXT:    [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
-; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT:    br label [[TMP47:%.*]]
+; AARCH64-SCOPE:       40:
+; AARCH64-SCOPE-NEXT:    [[TMP41:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SCOPE-NEXT:    [[TMP42:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT:    [[TMP43:%.*]] = shl i64 [[TMP42]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP44:%.*]] = ashr i64 [[TMP43]], 8
+; AARCH64-SCOPE-NEXT:    [[TMP45:%.*]] = ashr i64 [[TMP44]], 4
+; AARCH64-SCOPE-NEXT:    [[TMP46:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP45]]
+; AARCH64-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP46]], i8 [[TMP41]], i64 1, i1 false)
 ; AARCH64-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT:    br label [[TMP43]]
-; AARCH64-SCOPE:       43:
+; AARCH64-SCOPE-NEXT:    br label [[TMP47]]
+; AARCH64-SCOPE:       47:
 ; AARCH64-SCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-NOSCOPE-LABEL: @diamond_lifetime(
@@ -1264,7 +1330,7 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-NOSCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-NOSCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-NOSCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-NOSCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -1285,30 +1351,33 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-NOSCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-NOSCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-NOSCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-NOSCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-NOSCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-NOSCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
-; AARCH64-NOSCOPE-NEXT:    [[TMP30:%.*]] = tail call i1 (...) @cond()
-; AARCH64-NOSCOPE-NEXT:    br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP32:%.*]]
-; AARCH64-NOSCOPE:       31:
-; AARCH64-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT:    br label [[TMP33:%.*]]
-; AARCH64-NOSCOPE:       32:
-; AARCH64-NOSCOPE-NEXT:    br label [[TMP33]]
+; AARCH64-NOSCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-NOSCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-NOSCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-NOSCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP26]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT:    [[TMP32:%.*]] = tail call i1 (...) @cond()
+; AARCH64-NOSCOPE-NEXT:    br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP34:%.*]]
 ; AARCH64-NOSCOPE:       33:
-; AARCH64-NOSCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT:    [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT:    [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-NOSCOPE-NEXT:    [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-NOSCOPE-NEXT:    br label [[TMP35:%.*]]
+; AARCH64-NOSCOPE:       34:
+; AARCH64-NOSCOPE-NEXT:    br label [[TMP35]]
+; AARCH64-NOSCOPE:       35:
+; AARCH64-NOSCOPE-NEXT:    [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-NOSCOPE-NEXT:    [[TMP37:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT:    [[TMP38:%.*]] = shl i64 [[TMP37]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP39:%.*]] = ashr i64 [[TMP38]], 8
+; AARCH64-NOSCOPE-NEXT:    [[TMP40:%.*]] = ashr i64 [[TMP39]], 4
+; AARCH64-NOSCOPE-NEXT:    [[TMP41:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP40]]
+; AARCH64-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP41]], i8 [[TMP36]], i64 1, i1 false)
 ; AARCH64-NOSCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SHORT-SCOPE-LABEL: @diamond_lifetime(
@@ -1316,7 +1385,7 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -1337,42 +1406,46 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SHORT-SCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
-; AARCH64-SHORT-SCOPE-NEXT:    store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT:    store i8 [[TMP25]], ptr [[TMP31]], align 1
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP32:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT:    br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP39:%.*]]
-; AARCH64-SHORT-SCOPE:       33:
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP31]], i32 0
+; AARCH64-SHORT-SCOPE-NEXT:    store i8 1, ptr [[TMP32]], align 1
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT:    store i8 [[TMP26]], ptr [[TMP33]], align 1
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP34:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-SCOPE-NEXT:    br i1 [[TMP34]], label [[TMP35:%.*]], label [[TMP42:%.*]]
+; AARCH64-SHORT-SCOPE:       35:
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP37:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP38:%.*]] = shl i64 [[TMP37]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP39:%.*]] = ashr i64 [[TMP38]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP40:%.*]] = ashr i64 [[TMP39]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP41:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP40]]
+; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP41]], i8 [[TMP36]], i64 1, i1 false)
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT:    br label [[TMP45:%.*]]
-; AARCH64-SHORT-SCOPE:       39:
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP40:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP41:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP42:%.*]] = and i64 [[TMP41]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP43:%.*]] = lshr i64 [[TMP42]], 4
-; AARCH64-SHORT-SCOPE-NEXT:    [[TMP44:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP43]]
-; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP44]], i8 [[TMP40]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT:    br label [[TMP49:%.*]]
+; AARCH64-SHORT-SCOPE:       42:
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP43:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP44:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP45:%.*]] = shl i64 [[TMP44]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP46:%.*]] = ashr i64 [[TMP45]], 8
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP47:%.*]] = ashr i64 [[TMP46]], 4
+; AARCH64-SHORT-SCOPE-NEXT:    [[TMP48:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP47]]
+; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP48]], i8 [[TMP43]], i64 1, i1 false)
 ; AARCH64-SHORT-SCOPE-NEXT:    call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT:    br label [[TMP45]]
-; AARCH64-SHORT-SCOPE:       45:
+; AARCH64-SHORT-SCOPE-NEXT:    br label [[TMP49]]
+; AARCH64-SHORT-SCOPE:       49:
 ; AARCH64-SHORT-SCOPE-NEXT:    ret i32 0
 ;
 ; AARCH64-SHORT-NOSCOPE-LABEL: @diamond_lifetime(
@@ -1380,7 +1453,7 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2]])
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP8:%.*]] = shl i64 [[TMP7]], 44
@@ -1401,33 +1474,36 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
 ; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 [[TMP25]], ptr [[TMP31]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP32:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-NOSCOPE-NEXT:    br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP34:%.*]]
-; AARCH64-SHORT-NOSCOPE:       33:
-; AARCH64-SHORT-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT:    br label [[TMP35:%.*]]
-; AARCH64-SHORT-NOSCOPE:       34:
-; AARCH64-SHORT-NOSCOPE-NEXT:    br label [[TMP35]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP22:%.*]] = shl i64 [[TMP21]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP23:%.*]] = ashr i64 [[TMP22]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP24:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP28:%.*]] = shl i64 [[TMP27]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP29:%.*]] = ashr i64 [[TMP28]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP30:%.*]] = ashr i64 [[TMP29]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP31]], i32 0
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 1, ptr [[TMP32]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP33:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT:    store i8 [[TMP26]], ptr [[TMP33]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP34:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-NOSCOPE-NEXT:    br i1 [[TMP34]], label [[TMP35:%.*]], label [[TMP36:%.*]]
 ; AARCH64-SHORT-NOSCOPE:       35:
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP37:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP38:%.*]] = and i64 [[TMP37]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP40:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP39]]
-; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[TMP36]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT:    call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-NOSCOPE-NEXT:    br label [[TMP37:%.*]]
+; AARCH64-SHORT-NOSCOPE:       36:
+; AARCH64-SHORT-NOSCOPE-NEXT:    br label [[TMP37]]
+; AARCH64-SHORT-NOSCOPE:       37:
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP39:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP40:%.*]] = shl i64 [[TMP39]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP41:%.*]] = ashr i64 [[TMP40]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP42:%.*]] = ashr i64 [[TMP41]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT:    [[TMP43:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP42]]
+; AARCH64-SHORT-NOSCOPE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP43]], i8 [[TMP38]], i64 1, i1 false)
 ; AARCH64-SHORT-NOSCOPE-NEXT:    ret i32 0
 ;
   %1 = alloca i8, align 1



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