[llvm] [RISCV] Add DAG combine to turn (sub (shl X, 8-Y), (shr X, Y)) into orc.b (PR #111828)
Yingwei Zheng via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 10 06:20:14 PDT 2024
dtcxzyw wrote:
> > > (sub (shl X, 8 - Y), (srl X, Y)) => (orc.b X)
> >
> >
> > Can you provide alive2 proofs?
>
> Do you have a link to a guide for how to use alive2 for proofs where the target of the optimization is a RISC-V instruction?
You should promote/refine RISC-V instructions to llvm IR. I wrote a tool for this: https://github.com/dtcxzyw/rvtv.
Nevermind, I will provide the proof link later :)
https://github.com/llvm/llvm-project/pull/111828
More information about the llvm-commits
mailing list