[llvm] [RISCV] Add DAG combine to turn (sub (shl X, 8-Y), (shr X, Y)) into orc.b (PR #111828)

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``````````bash
git-clang-format --diff b773da0c5eed06f21f4caeea5eae47cacefb376c 3141c5dee88dc74b171940a713b2528220fcca6b --extensions cpp -- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index ee948ca71a..309e9e506a 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -13593,7 +13593,7 @@ static SDValue combineSubShiftToOrcB(SDNode *N, SelectionDAG &DAG,
 
   if (N0->getOpcode() != ISD::SHL)
     return SDValue();
-  
+
   auto *ShAmtCLeft = dyn_cast<ConstantSDNode>(N0.getOperand(1));
   if (!ShAmtCLeft)
     return SDValue();

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https://github.com/llvm/llvm-project/pull/111828