[llvm] 039e6f8 - [AMDGPU][NewPM] Fill out AMDGPU addMachineSSAOptimizations (#111658)

[via llvm-commits]

Author: Akshat Oke
Date: 2024-10-10T15:35:11+05:30
New Revision: 039e6f879cdbded38959763cc57da26477d2d454

URL: https://github.com/llvm/llvm-project/commit/039e6f879cdbded38959763cc57da26477d2d454
DIFF: https://github.com/llvm/llvm-project/commit/039e6f879cdbded38959763cc57da26477d2d454.diff

LOG: [AMDGPU][NewPM] Fill out AMDGPU addMachineSSAOptimizations (#111658)

Implement the addMachineSSAOptimizations passes for AMDGPU. Porting
the other generic passes in this category is WIP.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 2c84cdac76d027..23ee0c3e896eb3 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -47,6 +47,7 @@
 #include "llvm/Analysis/CGSCCPassManager.h"
 #include "llvm/Analysis/CallGraphSCCPass.h"
 #include "llvm/Analysis/UniformityAnalysis.h"
+#include "llvm/CodeGen/DeadMachineInstructionElim.h"
 #include "llvm/CodeGen/GlobalISel/CSEInfo.h"
 #include "llvm/CodeGen/GlobalISel/IRTranslator.h"
 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
@@ -54,6 +55,7 @@
 #include "llvm/CodeGen/GlobalISel/Localizer.h"
 #include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
 #include "llvm/CodeGen/MIRParser/MIParser.h"
+#include "llvm/CodeGen/MachineCSE.h"
 #include "llvm/CodeGen/MachineLICM.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/RegAllocRegistry.h"
@@ -1993,6 +1995,25 @@ Error AMDGPUCodeGenPassBuilder::addInstSelector(AddMachinePass &addPass) const {
   return Error::success();
 }
 
+void AMDGPUCodeGenPassBuilder::addMachineSSAOptimization(
+    AddMachinePass &addPass) const {
+  Base::addMachineSSAOptimization(addPass);
+
+  addPass(SIFoldOperandsPass());
+  if (EnableDPPCombine) {
+    addPass(GCNDPPCombinePass());
+  }
+  addPass(SILoadStoreOptimizerPass());
+  if (isPassEnabled(EnableSDWAPeephole)) {
+    addPass(SIPeepholeSDWAPass());
+    addPass(EarlyMachineLICMPass());
+    addPass(MachineCSEPass());
+    addPass(SIFoldOperandsPass());
+  }
+  addPass(DeadMachineInstructionElimPass());
+  addPass(SIShrinkInstructionsPass());
+}
+
 bool AMDGPUCodeGenPassBuilder::isPassEnabled(const cl::opt<bool> &Opt,
                                              CodeGenOptLevel Level) const {
   if (Opt.getNumOccurrences())

diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
index 5b7257ddb36f1e..af8476bc21ec61 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
@@ -174,6 +174,7 @@ class AMDGPUCodeGenPassBuilder
   void addPreISel(AddIRPass &addPass) const;
   void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;
   Error addInstSelector(AddMachinePass &) const;
+  void addMachineSSAOptimization(AddMachinePass &) const;
 
   /// Check if a pass is enabled given \p Opt option. The option always
   /// overrides defaults if explicitly used. Otherwise its default will be used