[llvm] a31d0b2 - [AMDGPU] Remove some lit check lines

[Jeffrey Byrnes via llvm-commits]

Author: Jeffrey Byrnes
Date: 2024-10-09T16:12:31-07:00
New Revision: a31d0b2e2bcc8c0c8907721896506c7ffd3e9502

URL: https://github.com/llvm/llvm-project/commit/a31d0b2e2bcc8c0c8907721896506c7ffd3e9502
DIFF: https://github.com/llvm/llvm-project/commit/a31d0b2e2bcc8c0c8907721896506c7ffd3e9502.diff

LOG: [AMDGPU] Remove some lit check lines

Change-Id: I77e72d23d41095b8fcc47996d8004f9e264968de

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll
    llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll b/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll
index c490c76f4531de..570ea4b7132aa6 100644
--- a/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll
+++ b/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll
@@ -2,8 +2,6 @@
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=tahiti -amdgpu-s-branch-bits=5 -amdgpu-long-branch-factor=0 -amdgpu-use-amdgpu-trackers=1  < %s | FileCheck --check-prefix=GCN-GCNTRACKERS %s
 
 ; CHECK-LABEL: {{^}}spill:
-; GCN:    codeLenInByte = 1000
-; GCN-GCNTRACKERS:    codeLenInByte = 1016
 ; GCN:    NumSgprs: 104
 ; GCN-GCNTRACKERS:    NumSgprs: 104
 ; GCN:    NumVgprs: 1
@@ -246,8 +244,6 @@ bb3:
 }
 
 ; CHECK-LABEL: {{^}}spill_func:
-; GCN:    codeLenInByte = 1612
-; GCN-GCNTRACKERS:    codeLenInByte = 1660
 ; GCN:    NumSgprs: 104
 ; GCN-GCNTRACKERS:    NumSgprs: 104
 ; GCN:    NumVgprs: 3

diff  --git a/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll b/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
index 53f533ebb28427..0dac327a2297c7 100644
--- a/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
+++ b/llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
@@ -11,8 +11,6 @@
 ; allow scheduling of other instructions which reduce RP
 
 ; CHECK-LABEL: {{^}}return_72xi32:
-; GFX11-PAL:    codeLenInByte = 768
-; GFX11-PAL-GCNTRACKERS:    codeLenInByte = 888
 ; GFX11-PAL:    NumSgprs: 33
 ; GFX11-PAL-GCNTRACKERS:    NumSgprs: 33
 ; GFX11-PAL:    NumVgprs: 64
@@ -22,8 +20,6 @@
 
 
 ; CHECK-LABEL: {{^}}call_72xi32:
-; GFX11-PAL:    codeLenInByte = 1300
-; GFX11-PAL-GCNTRACKERS:    codeLenInByte = 1372
 ; GFX11-PAL:    NumSgprs: 35
 ; GFX11-PAL-GCNTRACKERS:    NumSgprs: 35
 ; GFX11-PAL:    NumVgprs: 64
@@ -46,8 +42,6 @@ entry:
 }
 
 ; CHECK-LABEL: {{^}}global_extload_v16f16_to_v16f64:
-; TONGA:     codeLenInByte = 420
-; TONGA-GCNTRACKERS:     codeLenInByte = 436
 ; TONGA:    NumSgprs: 96
 ; TONGA-GCNTRACKERS:    NumSgprs: 96
 ; TONGA:    NumVgprs: 33
@@ -64,8 +58,6 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out
 }
 
 ; CHECK-LABEL: {{^}}constant_zextload_v64i16_to_v64i32:
-; GENERIC:     codeLenInByte = 860
-; GENERIC-GCNTRACKERS:     codeLenInByte = 860
 ; GENERIC:    NumSgprs: 71
 ; GENERIC-GCNTRACKERS:    NumSgprs: 54
 ; GENERIC:    NumVgprs: 16
@@ -81,8 +73,6 @@ define amdgpu_kernel void @constant_zextload_v64i16_to_v64i32(ptr addrspace(1) %
 }
 
 ; CHECK-LABEL: {{^}}excess_soft_clause_reg_pressure:
-; GFX908:     codeLenInByte = 1436
-; GFX908-GCNTRACKERS:     codeLenInByte = 1436
 ; GFX908:    NumSgprs: 56
 ; GFX908-GCNTRACKERS:    NumSgprs: 56
 ; GFX908:    NumVgprs: 43
@@ -644,4 +634,4 @@ declare align 4 ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr() #3
 attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,1" "amdgpu-flat-work-group-size"="1,1" }
 attributes #1 = { nounwind "amdgpu-num-vgpr"="64" }
 attributes #2 = { nofree nosync nounwind readnone speculatable willreturn }
-attributes #3 = { nounwind readnone speculatable willreturn }
\ No newline at end of file
+attributes #3 = { nounwind readnone speculatable willreturn }