[llvm] [LLVM][AArch64] Add register classes for Armv9.6 assembly (PR #111717)

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git-clang-format --diff 1df8ccd35b7140b4f1ca9e6d9d2fdf67f93357d4 3a88b7b3340afefc3ec3f50a3f9a7344c1655757 --extensions cpp -- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
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diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
index 5a26c4c941..d8e486eeb8 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
@@ -193,8 +193,8 @@ public:
 
   template <unsigned Multiple, unsigned Min = 0, unsigned Max = 30>
   uint32_t EncodeRegMul_MinMax(const MCInst &MI, unsigned OpIdx,
-                                 SmallVectorImpl<MCFixup> &Fixups,
-                                 const MCSubtargetInfo &STI) const;
+                               SmallVectorImpl<MCFixup> &Fixups,
+                               const MCSubtargetInfo &STI) const;
   uint32_t EncodeZK(const MCInst &MI, unsigned OpIdx,
                     SmallVectorImpl<MCFixup> &Fixups,
                     const MCSubtargetInfo &STI) const;
@@ -567,8 +567,8 @@ AArch64MCCodeEmitter::getVecShiftL8OpValue(const MCInst &MI, unsigned OpIdx,
 template <unsigned Multiple, unsigned Min, unsigned Max>
 uint32_t
 AArch64MCCodeEmitter::EncodeRegMul_MinMax(const MCInst &MI, unsigned OpIdx,
-                                            SmallVectorImpl<MCFixup> &Fixups,
-                                            const MCSubtargetInfo &STI) const {
+                                          SmallVectorImpl<MCFixup> &Fixups,
+                                          const MCSubtargetInfo &STI) const {
   assert(llvm::isPowerOf2_32(Multiple) && "Multiple is not a power of 2");
   auto RegOpnd = MI.getOperand(OpIdx).getReg();
   unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd);

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https://github.com/llvm/llvm-project/pull/111717