[llvm] [AArch64] Improve index selection for histograms (PR #111150)

[James Chesterman via llvm-commits]

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@@ -267,5 +267,79 @@ define void @histogram_i16_8_lane(ptr %base, <vscale x 8 x i32> %indices, i16 %i
   ret void
 }
 
+define void @histogram_i32_zextend(ptr %base, <vscale x 4 x i32> %indices, <vscale x 4 x i1> %mask) #0 {
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JamesChesterman wrote:

Yes this test fails with the following message:
`llc: /home/jamche01/LLVMGerrit/organic-llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:2763: llvm::SDValue llvm::DAGTypeLegalizer::PromoteIntOp_VECTOR_HISTOGRAM(llvm::SDNode*, unsigned int): Assertion OpNo == 1 && "Unexpected operand for promotion"' failed.`

Should I try and change LegalizeInteger type so that it can also promote `%buckets` (maybe by adding a `|| OpNo == 0` to the assertion)? Or would this maybe be unexpected behaviour, and should I just change my solution so the type isn't truncated to its original if the original isn't i32?


https://github.com/llvm/llvm-project/pull/111150