[llvm] [RISCV][GISEL] instruction-select for G_SPLAT_VECTOR (PR #111193)

Michael Maitland via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 7 07:22:35 PDT 2024


================
@@ -800,6 +812,33 @@ void RISCVInstructionSelector::preISelLower(MachineInstr &MI,
     replacePtrWithInt(MI.getOperand(1), MIB);
     MI.setDesc(TII.get(TargetOpcode::G_AND));
     MRI->setType(DstReg, sXLen);
+    break;
+  }
+  case TargetOpcode::G_SPLAT_VECTOR: {
+    // Convert integer SPLAT_VECTOR to VMV_V_X_VL and floating-point
+    // SPLAT_VECTOR to VFMV_V_F_VL to reduce isel burden.
+    Register Scalar = MI.getOperand(1).getReg();
+    bool IsGPRSplat = isRegInGprb(Scalar);
+    const LLT sXLen = LLT::scalar(STI.getXLen());
+    if (IsGPRSplat && TypeSize::isKnownLT(MRI->getType(Scalar).getSizeInBits(),
+                                          sXLen.getSizeInBits()))
+      Scalar = MIB.buildAnyExt(sXLen, Scalar).getReg(0);
----------------
michaelmaitland wrote:

I changed this case to an assert, since we don't seem to be generating this case yet.

https://github.com/llvm/llvm-project/pull/111193


More information about the llvm-commits mailing list