[llvm] 8b6e1dc - [X86] getIntImmCostInst - reduce i64 imm costs of AND(X,CMASK) case that can fold to BEXT/BZHI

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 7 04:56:12 PDT 2024


Author: Simon Pilgrim
Date: 2024-10-07T12:55:54+01:00
New Revision: 8b6e1dc924fd3c35670b46d744091d2f7ce94c5f

URL: https://github.com/llvm/llvm-project/commit/8b6e1dc924fd3c35670b46d744091d2f7ce94c5f
DIFF: https://github.com/llvm/llvm-project/commit/8b6e1dc924fd3c35670b46d744091d2f7ce94c5f.diff

LOG: [X86] getIntImmCostInst - reduce i64 imm costs of AND(X,CMASK) case that can fold to BEXT/BZHI

With BEXT/BZHI the i64 imm mask will be replaced with a i16/i8 control mask

Fixes #111323

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    llvm/test/CodeGen/X86/extract-lowbits.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index bff958baffd40c..aa84e3887c3890 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5828,6 +5828,10 @@ InstructionCost X86TTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx,
     // immediates here as the normal path expects bit 31 to be sign extended.
     if (Idx == 1 && ImmBitWidth == 64 && Imm.isIntN(32))
       return TTI::TCC_Free;
+    // If we have BMI then we can use BEXTR/BZHI to mask out upper i64 bits.
+    if (Idx == 1 && ImmBitWidth == 64 && ST->is64Bit() && ST->hasBMI() &&
+        Imm.isMask())
+      return X86TTIImpl::getIntImmCost(ST->hasBMI2() ? 255 : 65535);
     ImmIdx = 1;
     break;
   case Instruction::Add:

diff  --git a/llvm/test/CodeGen/X86/extract-lowbits.ll b/llvm/test/CodeGen/X86/extract-lowbits.ll
index 9b754e1541ea92..077e7770c83cd0 100644
--- a/llvm/test/CodeGen/X86/extract-lowbits.ll
+++ b/llvm/test/CodeGen/X86/extract-lowbits.ll
@@ -4508,7 +4508,7 @@ define i64 @bzhi64_constant_mask8_load(ptr %val) nounwind {
   ret i64 %masked
 }
 
-; TODO: Ensure constant hoisting doesn't prevent BEXTR/BZHI instructions in both paths.
+; Ensure constant hoisting doesn't prevent BEXTR/BZHI instructions in both paths.
 define void @PR111323(ptr nocapture noundef writeonly %use, i64 noundef %x, i64 noundef %y) nounwind {
 ; X86-LABEL: PR111323:
 ; X86:       # %bb.0: # %entry
@@ -4555,9 +4555,9 @@ define void @PR111323(ptr nocapture noundef writeonly %use, i64 noundef %x, i64
 ; X64-BMI1NOTBM-NEXT:    testq %rdx, %rdx
 ; X64-BMI1NOTBM-NEXT:    je .LBB68_2
 ; X64-BMI1NOTBM-NEXT:  # %bb.1: # %if.end
-; X64-BMI1NOTBM-NEXT:    movabsq $281474976710655, %rax # imm = 0xFFFFFFFFFFFF
-; X64-BMI1NOTBM-NEXT:    andq %rax, %rdx
-; X64-BMI1NOTBM-NEXT:    movq %rdx, 8(%rdi)
+; X64-BMI1NOTBM-NEXT:    movl $12288, %eax # imm = 0x3000
+; X64-BMI1NOTBM-NEXT:    bextrq %rax, %rdx, %rax
+; X64-BMI1NOTBM-NEXT:    movq %rax, 8(%rdi)
 ; X64-BMI1NOTBM-NEXT:  .LBB68_2: # %return
 ; X64-BMI1NOTBM-NEXT:    retq
 ;
@@ -4568,9 +4568,8 @@ define void @PR111323(ptr nocapture noundef writeonly %use, i64 noundef %x, i64
 ; X64-BMI1TBM-NEXT:    testq %rdx, %rdx
 ; X64-BMI1TBM-NEXT:    je .LBB68_2
 ; X64-BMI1TBM-NEXT:  # %bb.1: # %if.end
-; X64-BMI1TBM-NEXT:    movabsq $281474976710655, %rax # imm = 0xFFFFFFFFFFFF
-; X64-BMI1TBM-NEXT:    andq %rax, %rdx
-; X64-BMI1TBM-NEXT:    movq %rdx, 8(%rdi)
+; X64-BMI1TBM-NEXT:    bextrq $12288, %rdx, %rax # imm = 0x3000
+; X64-BMI1TBM-NEXT:    movq %rax, 8(%rdi)
 ; X64-BMI1TBM-NEXT:  .LBB68_2: # %return
 ; X64-BMI1TBM-NEXT:    retq
 ;
@@ -4581,23 +4580,21 @@ define void @PR111323(ptr nocapture noundef writeonly %use, i64 noundef %x, i64
 ; X64-BMI2TBM-NEXT:    testq %rdx, %rdx
 ; X64-BMI2TBM-NEXT:    je .LBB68_2
 ; X64-BMI2TBM-NEXT:  # %bb.1: # %if.end
-; X64-BMI2TBM-NEXT:    movabsq $281474976710655, %rax # imm = 0xFFFFFFFFFFFF
-; X64-BMI2TBM-NEXT:    andq %rax, %rdx
-; X64-BMI2TBM-NEXT:    movq %rdx, 8(%rdi)
+; X64-BMI2TBM-NEXT:    bextrq $12288, %rdx, %rax # imm = 0x3000
+; X64-BMI2TBM-NEXT:    movq %rax, 8(%rdi)
 ; X64-BMI2TBM-NEXT:  .LBB68_2: # %return
 ; X64-BMI2TBM-NEXT:    retq
 ;
 ; X64-BMI2NOTBM-LABEL: PR111323:
 ; X64-BMI2NOTBM:       # %bb.0: # %entry
 ; X64-BMI2NOTBM-NEXT:    movb $48, %al
-; X64-BMI2NOTBM-NEXT:    bzhiq %rax, %rsi, %rax
-; X64-BMI2NOTBM-NEXT:    movq %rax, (%rdi)
+; X64-BMI2NOTBM-NEXT:    bzhiq %rax, %rsi, %rcx
+; X64-BMI2NOTBM-NEXT:    movq %rcx, (%rdi)
 ; X64-BMI2NOTBM-NEXT:    testq %rdx, %rdx
 ; X64-BMI2NOTBM-NEXT:    je .LBB68_2
 ; X64-BMI2NOTBM-NEXT:  # %bb.1: # %if.end
-; X64-BMI2NOTBM-NEXT:    movabsq $281474976710655, %rax # imm = 0xFFFFFFFFFFFF
-; X64-BMI2NOTBM-NEXT:    andq %rax, %rdx
-; X64-BMI2NOTBM-NEXT:    movq %rdx, 8(%rdi)
+; X64-BMI2NOTBM-NEXT:    bzhiq %rax, %rdx, %rax
+; X64-BMI2NOTBM-NEXT:    movq %rax, 8(%rdi)
 ; X64-BMI2NOTBM-NEXT:  .LBB68_2: # %return
 ; X64-BMI2NOTBM-NEXT:    retq
 entry:


        


More information about the llvm-commits mailing list