[llvm] [RFC] IR: Define noalias.addrspace metadata (PR #102461)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 7 02:15:36 PDT 2024
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/102461
>From 63ad716637f35eeec9e6b3de9f262a8e91e63b42 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Wed, 7 Aug 2024 23:21:46 +0400
Subject: [PATCH 1/6] [RFC] IR: Define noalias.addrspace metadata
This is intended to solve a problem with lowering atomics in
OpenMP and C++ common to AMDGPU and NVPTX.
In OpenCL and CUDA, it is undefined behavior for an atomic instruction
to modify an object in thread private memory. In OpenMP, it is defined.
Correspondingly, the hardware does not handle this correctly. For AMDGPU,
32-bit atomics work and 64-bit atomics are silently dropped. We therefore
need to codegen this by inserting a runtime address space check, performing
the private case without atomics, and fallback to issuing the real atomic
otherwise. This metadata allows us to avoid this extra check and branch.
Handle this by introducing metadata intended to be applied to atomicrmw,
indicating they cannot access the forbidden address space.
---
llvm/docs/LangRef.rst | 36 +++++++
llvm/docs/ReleaseNotes.md | 2 +
llvm/include/llvm/IR/FixedMetadataKinds.def | 1 +
llvm/lib/IR/Verifier.cpp | 34 ++++--
llvm/test/Assembler/noalias-addrspace-md.ll | 110 ++++++++++++++++++++
llvm/test/Verifier/noalias-addrspace.ll | 60 +++++++++++
6 files changed, 237 insertions(+), 6 deletions(-)
create mode 100644 llvm/test/Assembler/noalias-addrspace-md.ll
create mode 100644 llvm/test/Verifier/noalias-addrspace.ll
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 6fa35486669d69..d20bf62dd05951 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -8047,6 +8047,42 @@ it will contain a list of ids, including the ids of the callsites in the
full inline sequence, in order from the leaf-most call's id to the outermost
inlined call.
+
+'``noalias.addrspace``' Metadata
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The ``noalias.addrspace`` metadata is used to identify memory
+operations which cannot access a range of address spaces. It is
+attached to memory instructions, including :ref:`atomicrmw
+<i_atomicrmw>`, :ref:`cmpxchg <i_cmpxchg>`, and :ref:`call <i_call>`
+instructions.
+
+This follows the same form as :ref:`range metadata <_range-metadata>`,
+except the field entries must be of type `i32`. The interpretation is
+the same numeric address spaces as applied to IR values.
+
+Example:
+
+.. code-block:: llvm
+ ; %ptr cannot point to an object allocated in addrspace(5)
+ %rmw.valid = atomicrmw and ptr %ptr, i64 %value seq_cst, !noalias.addrspace !0
+
+ ; Undefined behavior. The underlying object is allocated in one of the listed
+ ; address spaces.
+ %alloca = alloca i64, addrspace(5)
+ %alloca.cast = addrspacecast ptr addrspace(5) %alloca to ptr
+ %rmw.ub = atomicrmw and ptr %alloca.cast, i64 %value seq_cst, !noalias.addrspace !0
+
+ !0 = !{i32 5, i32 6}
+
+
+This is intended for use on targets with a notion of generic address
+spaces, which at runtime resolve to different physical memory
+spaces. The interpretation of the address space values is target
+specific. The behavior is undefined if the runtime memory address does
+resolve to an object defined in one of the indicated address spaces.
+
+
Module Flags Metadata
=====================
diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md
index f44d636a203374..8ac5900a7e532e 100644
--- a/llvm/docs/ReleaseNotes.md
+++ b/llvm/docs/ReleaseNotes.md
@@ -62,6 +62,8 @@ Changes to the LLVM IR
* Added `usub_cond` and `usub_sat` operations to `atomicrmw`.
+* Introduced `noalias.addrspace` metadata.
+
* Remove the following intrinsics which can be replaced with a `bitcast`:
* `llvm.nvvm.bitcast.f2i`
diff --git a/llvm/include/llvm/IR/FixedMetadataKinds.def b/llvm/include/llvm/IR/FixedMetadataKinds.def
index 5f4cc230a0f5ff..df572e8791e13b 100644
--- a/llvm/include/llvm/IR/FixedMetadataKinds.def
+++ b/llvm/include/llvm/IR/FixedMetadataKinds.def
@@ -52,3 +52,4 @@ LLVM_FIXED_MD_KIND(MD_pcsections, "pcsections", 37)
LLVM_FIXED_MD_KIND(MD_DIAssignID, "DIAssignID", 38)
LLVM_FIXED_MD_KIND(MD_coro_outside_frame, "coro.outside.frame", 39)
LLVM_FIXED_MD_KIND(MD_mmra, "mmra", 40)
+LLVM_FIXED_MD_KIND(MD_noalias_addrspace, "noalias.addrspace", 41)
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index 1cd5eb36c4ab69..0ad7000d54490f 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -516,8 +516,9 @@ class Verifier : public InstVisitor<Verifier>, VerifierSupport {
void visitFunction(const Function &F);
void visitBasicBlock(BasicBlock &BB);
void verifyRangeMetadata(const Value &V, const MDNode *Range, Type *Ty,
- bool IsAbsoluteSymbol);
+ bool IsAbsoluteSymbol, bool IsAddrSpaceRange);
void visitRangeMetadata(Instruction &I, MDNode *Range, Type *Ty);
+ void visitNoaliasAddrspaceMetadata(Instruction &I, MDNode *Range, Type *Ty);
void visitDereferenceableMetadata(Instruction &I, MDNode *MD);
void visitProfMetadata(Instruction &I, MDNode *MD);
void visitCallStackMetadata(MDNode *MD);
@@ -761,7 +762,7 @@ void Verifier::visitGlobalValue(const GlobalValue &GV) {
if (const MDNode *AbsoluteSymbol =
GO->getMetadata(LLVMContext::MD_absolute_symbol)) {
verifyRangeMetadata(*GO, AbsoluteSymbol, DL.getIntPtrType(GO->getType()),
- true);
+ true, false);
}
}
@@ -4137,7 +4138,8 @@ static bool isContiguous(const ConstantRange &A, const ConstantRange &B) {
/// Verify !range and !absolute_symbol metadata. These have the same
/// restrictions, except !absolute_symbol allows the full set.
void Verifier::verifyRangeMetadata(const Value &I, const MDNode *Range,
- Type *Ty, bool IsAbsoluteSymbol) {
+ Type *Ty, bool IsAbsoluteSymbol,
+ bool IsAddrSpaceRange) {
unsigned NumOperands = Range->getNumOperands();
Check(NumOperands % 2 == 0, "Unfinished range!", Range);
unsigned NumRanges = NumOperands / 2;
@@ -4154,8 +4156,14 @@ void Verifier::verifyRangeMetadata(const Value &I, const MDNode *Range,
Check(High->getType() == Low->getType(), "Range pair types must match!",
&I);
- Check(High->getType() == Ty->getScalarType(),
- "Range types must match instruction type!", &I);
+
+ if (IsAddrSpaceRange) {
+ Check(High->getType()->isIntegerTy(32),
+ "noalias.addrspace type must be i32!", &I);
+ } else {
+ Check(High->getType() == Ty->getScalarType(),
+ "Range types must match instruction type!", &I);
+ }
APInt HighV = High->getValue();
APInt LowV = Low->getValue();
@@ -4194,7 +4202,14 @@ void Verifier::verifyRangeMetadata(const Value &I, const MDNode *Range,
void Verifier::visitRangeMetadata(Instruction &I, MDNode *Range, Type *Ty) {
assert(Range && Range == I.getMetadata(LLVMContext::MD_range) &&
"precondition violation");
- verifyRangeMetadata(I, Range, Ty, false);
+ verifyRangeMetadata(I, Range, Ty, false, false);
+}
+
+void Verifier::visitNoaliasAddrspaceMetadata(Instruction &I, MDNode *Range,
+ Type *Ty) {
+ assert(Range && Range == I.getMetadata(LLVMContext::MD_noalias_addrspace) &&
+ "precondition violation");
+ verifyRangeMetadata(I, Range, Ty, false, true);
}
void Verifier::checkAtomicMemAccessSize(Type *Ty, const Instruction *I) {
@@ -5187,6 +5202,13 @@ void Verifier::visitInstruction(Instruction &I) {
visitRangeMetadata(I, Range, I.getType());
}
+ if (MDNode *Range = I.getMetadata(LLVMContext::MD_noalias_addrspace)) {
+ Check(isa<LoadInst>(I) || isa<StoreInst>(I) || isa<AtomicRMWInst>(I) ||
+ isa<AtomicCmpXchgInst>(I) || isa<CallInst>(I),
+ "noalias.addrspace are only for memory operations!", &I);
+ visitNoaliasAddrspaceMetadata(I, Range, I.getType());
+ }
+
if (I.hasMetadata(LLVMContext::MD_invariant_group)) {
Check(isa<LoadInst>(I) || isa<StoreInst>(I),
"invariant.group metadata is only for loads and stores", &I);
diff --git a/llvm/test/Assembler/noalias-addrspace-md.ll b/llvm/test/Assembler/noalias-addrspace-md.ll
new file mode 100644
index 00000000000000..62fabad86f683a
--- /dev/null
+++ b/llvm/test/Assembler/noalias-addrspace-md.ll
@@ -0,0 +1,110 @@
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+
+define i64 @atomicrmw_noalias_addrspace__0_1(ptr %ptr, i64 %val) {
+; CHECK-LABEL: define i64 @atomicrmw_noalias_addrspace__0_1(
+; CHECK-SAME: ptr [[PTR:%.*]], i64 [[VAL:%.*]]) {
+; CHECK-NEXT: [[RET:%.*]] = atomicrmw add ptr [[PTR]], i64 [[VAL]] seq_cst, align 8, !noalias.addrspace [[META0:![0-9]+]]
+; CHECK-NEXT: ret i64 [[RET]]
+;
+ %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, align 8, !noalias.addrspace !0
+ ret i64 %ret
+}
+
+define i64 @atomicrmw_noalias_addrspace__0_2(ptr %ptr, i64 %val) {
+; CHECK-LABEL: define i64 @atomicrmw_noalias_addrspace__0_2(
+; CHECK-SAME: ptr [[PTR:%.*]], i64 [[VAL:%.*]]) {
+; CHECK-NEXT: [[RET:%.*]] = atomicrmw add ptr [[PTR]], i64 [[VAL]] seq_cst, align 8, !noalias.addrspace [[META1:![0-9]+]]
+; CHECK-NEXT: ret i64 [[RET]]
+;
+ %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, align 8, !noalias.addrspace !1
+ ret i64 %ret
+}
+
+define i64 @atomicrmw_noalias_addrspace__1_3(ptr %ptr, i64 %val) {
+; CHECK-LABEL: define i64 @atomicrmw_noalias_addrspace__1_3(
+; CHECK-SAME: ptr [[PTR:%.*]], i64 [[VAL:%.*]]) {
+; CHECK-NEXT: [[RET:%.*]] = atomicrmw add ptr [[PTR]], i64 [[VAL]] seq_cst, align 8, !noalias.addrspace [[META2:![0-9]+]]
+; CHECK-NEXT: ret i64 [[RET]]
+;
+ %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, align 8, !noalias.addrspace !2
+ ret i64 %ret
+}
+
+define i64 @atomicrmw_noalias_addrspace__multiple_ranges(ptr %ptr, i64 %val) {
+; CHECK-LABEL: define i64 @atomicrmw_noalias_addrspace__multiple_ranges(
+; CHECK-SAME: ptr [[PTR:%.*]], i64 [[VAL:%.*]]) {
+; CHECK-NEXT: [[RET:%.*]] = atomicrmw add ptr [[PTR]], i64 [[VAL]] seq_cst, align 8, !noalias.addrspace [[META3:![0-9]+]]
+; CHECK-NEXT: ret i64 [[RET]]
+;
+ %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, align 8, !noalias.addrspace !3
+ ret i64 %ret
+}
+
+define i64 @load_noalias_addrspace__5_6(ptr %ptr) {
+; CHECK-LABEL: define i64 @load_noalias_addrspace__5_6(
+; CHECK-SAME: ptr [[PTR:%.*]]) {
+; CHECK-NEXT: [[RET:%.*]] = load i64, ptr [[PTR]], align 4, !noalias.addrspace [[META4:![0-9]+]]
+; CHECK-NEXT: ret i64 [[RET]]
+;
+ %ret = load i64, ptr %ptr, align 4, !noalias.addrspace !4
+ ret i64 %ret
+}
+
+define void @store_noalias_addrspace__5_6(ptr %ptr, i64 %val) {
+; CHECK-LABEL: define void @store_noalias_addrspace__5_6(
+; CHECK-SAME: ptr [[PTR:%.*]], i64 [[VAL:%.*]]) {
+; CHECK-NEXT: store i64 [[VAL]], ptr [[PTR]], align 4, !noalias.addrspace [[META4]]
+; CHECK-NEXT: ret void
+;
+ store i64 %val, ptr %ptr, align 4, !noalias.addrspace !4
+ ret void
+}
+
+define { i64, i1 } @cmpxchg_noalias_addrspace__5_6(ptr %ptr, i64 %val0, i64 %val1) {
+; CHECK-LABEL: define { i64, i1 } @cmpxchg_noalias_addrspace__5_6(
+; CHECK-SAME: ptr [[PTR:%.*]], i64 [[VAL0:%.*]], i64 [[VAL1:%.*]]) {
+; CHECK-NEXT: [[RET:%.*]] = cmpxchg ptr [[PTR]], i64 [[VAL0]], i64 [[VAL1]] monotonic monotonic, align 8, !noalias.addrspace [[META4]]
+; CHECK-NEXT: ret { i64, i1 } [[RET]]
+;
+ %ret = cmpxchg ptr %ptr, i64 %val0, i64 %val1 monotonic monotonic, align 8, !noalias.addrspace !4
+ ret { i64, i1 } %ret
+}
+
+declare void @foo()
+
+define void @call_noalias_addrspace__5_6(ptr %ptr) {
+; CHECK-LABEL: define void @call_noalias_addrspace__5_6(
+; CHECK-SAME: ptr [[PTR:%.*]]) {
+; CHECK-NEXT: call void @foo(), !noalias.addrspace [[META4]]
+; CHECK-NEXT: ret void
+;
+ call void @foo(), !noalias.addrspace !4
+ ret void
+}
+
+define void @call_memcpy_intrinsic_addrspace__5_6(ptr %dst, ptr %src, i64 %size) {
+; CHECK-LABEL: define void @call_memcpy_intrinsic_addrspace__5_6(
+; CHECK-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]], i64 [[SIZE:%.*]]) {
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr [[DST]], ptr [[SRC]], i64 [[SIZE]], i1 false), !noalias.addrspace [[META4]]
+; CHECK-NEXT: ret void
+;
+ call void @llvm.memcpy.p0.p0.i64(ptr %dst, ptr %src, i64 %size, i1 false), !noalias.addrspace !4
+ ret void
+}
+
+declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0
+
+attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
+
+!0 = !{i32 0, i32 1}
+!1 = !{i32 0, i32 2}
+!2 = !{i32 1, i32 3}
+!3 = !{i32 4, i32 6, i32 10, i32 55}
+!4 = !{i32 5, i32 6}
+;.
+; CHECK: [[META0]] = !{i32 0, i32 1}
+; CHECK: [[META1]] = !{i32 0, i32 2}
+; CHECK: [[META2]] = !{i32 1, i32 3}
+; CHECK: [[META3]] = !{i32 4, i32 6, i32 10, i32 55}
+; CHECK: [[META4]] = !{i32 5, i32 6}
+;.
diff --git a/llvm/test/Verifier/noalias-addrspace.ll b/llvm/test/Verifier/noalias-addrspace.ll
new file mode 100644
index 00000000000000..67a7293d2561cc
--- /dev/null
+++ b/llvm/test/Verifier/noalias-addrspace.ll
@@ -0,0 +1,60 @@
+; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s
+
+; CHECK: It should have at least one range!
+; CHECK-NEXT: !0 = !{}
+define i64 @noalias_addrspace__empty(ptr %ptr, i64 %val) {
+ %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !0
+ ret i64 %ret
+}
+
+; CHECK: Unfinished range!
+; CHECK-NEXT: !1 = !{i32 0}
+define i64 @noalias_addrspace__single_field(ptr %ptr, i64 %val) {
+ %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !1
+ ret i64 %ret
+}
+
+; CHECK: Range must not be empty!
+; CHECK-NEXT: !2 = !{i32 0, i32 0}
+define i64 @noalias_addrspace__0_0(ptr %ptr, i64 %val) {
+ %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !2
+ ret i64 %ret
+}
+
+; CHECK: noalias.addrspace type must be i32!
+; CHECK-NEXT: %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, align 8, !noalias.addrspace !3
+define i64 @noalias_addrspace__i64(ptr %ptr, i64 %val) {
+ %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !3
+ ret i64 %ret
+}
+
+; CHECK: The lower limit must be an integer!
+define i64 @noalias_addrspace__fp(ptr %ptr, i64 %val) {
+ %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !4
+ ret i64 %ret
+}
+
+; CHECK: The lower limit must be an integer!
+define i64 @noalias_addrspace__ptr(ptr %ptr, i64 %val) {
+ %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !5
+ ret i64 %ret
+}
+
+; CHECK: The lower limit must be an integer!
+define i64 @noalias_addrspace__nonconstant(ptr %ptr, i64 %val) {
+ %ret = atomicrmw add ptr %ptr, i64 %val seq_cst, !noalias.addrspace !6
+ ret i64 %ret
+}
+
+ at gv0 = global i32 0
+ at gv1 = global i32 1
+
+!0 = !{}
+!1 = !{i32 0}
+!2 = !{i32 0, i32 0}
+!3 = !{i64 1, i64 5}
+!4 = !{float 0.0, float 2.0}
+!5 = !{ptr null, ptr addrspace(1) null}
+!6 = !{i32 ptrtoint (ptr @gv0 to i32), i32 ptrtoint (ptr @gv1 to i32) }
+
+
>From a2e9181e33c6da3499ad0ceed428264b8bc06a67 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Fri, 9 Aug 2024 15:03:22 +0400
Subject: [PATCH 2/6] Use enum for range like metadata kinds
---
llvm/lib/IR/Verifier.cpp | 33 ++++++++++++++++++++++-----------
1 file changed, 22 insertions(+), 11 deletions(-)
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index 0ad7000d54490f..b89c9ce46e7d61 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -492,6 +492,14 @@ class Verifier : public InstVisitor<Verifier>, VerifierSupport {
/// Whether a metadata node is allowed to be, or contain, a DILocation.
enum class AreDebugLocsAllowed { No, Yes };
+ /// Metadata that should be treated as a range, with slightly different
+ /// requirements.
+ enum class RangeLikeMetadataKind {
+ Range, // MD_range
+ AbsoluteSymbol, // MD_absolute_symbol
+ NoaliasAddrspace // MD_noalias_addrspace
+ };
+
// Verification methods...
void visitGlobalValue(const GlobalValue &GV);
void visitGlobalVariable(const GlobalVariable &GV);
@@ -515,8 +523,8 @@ class Verifier : public InstVisitor<Verifier>, VerifierSupport {
void visitModuleFlagCGProfileEntry(const MDOperand &MDO);
void visitFunction(const Function &F);
void visitBasicBlock(BasicBlock &BB);
- void verifyRangeMetadata(const Value &V, const MDNode *Range, Type *Ty,
- bool IsAbsoluteSymbol, bool IsAddrSpaceRange);
+ void verifyRangeLikeMetadata(const Value &V, const MDNode *Range, Type *Ty,
+ RangeLikeMetadataKind Kind);
void visitRangeMetadata(Instruction &I, MDNode *Range, Type *Ty);
void visitNoaliasAddrspaceMetadata(Instruction &I, MDNode *Range, Type *Ty);
void visitDereferenceableMetadata(Instruction &I, MDNode *MD);
@@ -761,8 +769,9 @@ void Verifier::visitGlobalValue(const GlobalValue &GV) {
// FIXME: Why is getMetadata on GlobalValue protected?
if (const MDNode *AbsoluteSymbol =
GO->getMetadata(LLVMContext::MD_absolute_symbol)) {
- verifyRangeMetadata(*GO, AbsoluteSymbol, DL.getIntPtrType(GO->getType()),
- true, false);
+ verifyRangeLikeMetadata(*GO, AbsoluteSymbol,
+ DL.getIntPtrType(GO->getType()),
+ RangeLikeMetadataKind::AbsoluteSymbol);
}
}
@@ -4137,9 +4146,8 @@ static bool isContiguous(const ConstantRange &A, const ConstantRange &B) {
/// Verify !range and !absolute_symbol metadata. These have the same
/// restrictions, except !absolute_symbol allows the full set.
-void Verifier::verifyRangeMetadata(const Value &I, const MDNode *Range,
- Type *Ty, bool IsAbsoluteSymbol,
- bool IsAddrSpaceRange) {
+void Verifier::verifyRangeLikeMetadata(const Value &I, const MDNode *Range,
+ Type *Ty, RangeLikeMetadataKind Kind) {
unsigned NumOperands = Range->getNumOperands();
Check(NumOperands % 2 == 0, "Unfinished range!", Range);
unsigned NumRanges = NumOperands / 2;
@@ -4157,7 +4165,7 @@ void Verifier::verifyRangeMetadata(const Value &I, const MDNode *Range,
Check(High->getType() == Low->getType(), "Range pair types must match!",
&I);
- if (IsAddrSpaceRange) {
+ if (Kind == RangeLikeMetadataKind::NoaliasAddrspace) {
Check(High->getType()->isIntegerTy(32),
"noalias.addrspace type must be i32!", &I);
} else {
@@ -4174,7 +4182,9 @@ void Verifier::verifyRangeMetadata(const Value &I, const MDNode *Range,
"The upper and lower limits cannot be the same value", &I);
ConstantRange CurRange(LowV, HighV);
- Check(!CurRange.isEmptySet() && (IsAbsoluteSymbol || !CurRange.isFullSet()),
+ Check(!CurRange.isEmptySet() &&
+ (Kind == RangeLikeMetadataKind::AbsoluteSymbol ||
+ !CurRange.isFullSet()),
"Range must not be empty!", Range);
if (i != 0) {
Check(CurRange.intersectWith(LastRange).isEmptySet(),
@@ -4202,14 +4212,15 @@ void Verifier::verifyRangeMetadata(const Value &I, const MDNode *Range,
void Verifier::visitRangeMetadata(Instruction &I, MDNode *Range, Type *Ty) {
assert(Range && Range == I.getMetadata(LLVMContext::MD_range) &&
"precondition violation");
- verifyRangeMetadata(I, Range, Ty, false, false);
+ verifyRangeLikeMetadata(I, Range, Ty, RangeLikeMetadataKind::Range);
}
void Verifier::visitNoaliasAddrspaceMetadata(Instruction &I, MDNode *Range,
Type *Ty) {
assert(Range && Range == I.getMetadata(LLVMContext::MD_noalias_addrspace) &&
"precondition violation");
- verifyRangeMetadata(I, Range, Ty, false, true);
+ verifyRangeLikeMetadata(I, Range, Ty,
+ RangeLikeMetadataKind::NoaliasAddrspace);
}
void Verifier::checkAtomicMemAccessSize(Type *Ty, const Instruction *I) {
>From d1384fe30eb29120d38d4ca1b43ed9f4e208a7e6 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Fri, 9 Aug 2024 15:18:24 +0400
Subject: [PATCH 3/6] Fix doc build
---
llvm/docs/LangRef.rst | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index d20bf62dd05951..9b91e4411f2464 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -8057,13 +8057,14 @@ attached to memory instructions, including :ref:`atomicrmw
<i_atomicrmw>`, :ref:`cmpxchg <i_cmpxchg>`, and :ref:`call <i_call>`
instructions.
-This follows the same form as :ref:`range metadata <_range-metadata>`,
+This follows the same form as :ref:`range metadata <range-metadata>`,
except the field entries must be of type `i32`. The interpretation is
the same numeric address spaces as applied to IR values.
Example:
.. code-block:: llvm
+
; %ptr cannot point to an object allocated in addrspace(5)
%rmw.valid = atomicrmw and ptr %ptr, i64 %value seq_cst, !noalias.addrspace !0
>From 4e9ec214774a100b5754bfb5aa36cd77ba572bf8 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Wed, 14 Aug 2024 16:12:10 +0400
Subject: [PATCH 4/6] Add baseline tests for some optimization handling
---
.../InstCombine/loadstore-metadata.ll | 14 ++++
.../SimplifyCFG/hoist-with-metadata.ll | 70 +++++++++++++++++++
2 files changed, 84 insertions(+)
diff --git a/llvm/test/Transforms/InstCombine/loadstore-metadata.ll b/llvm/test/Transforms/InstCombine/loadstore-metadata.ll
index b9a96937e57c77..247a02f0bcc14a 100644
--- a/llvm/test/Transforms/InstCombine/loadstore-metadata.ll
+++ b/llvm/test/Transforms/InstCombine/loadstore-metadata.ll
@@ -173,6 +173,19 @@ define i32 @test_load_cast_combine_noundef(ptr %ptr) {
ret i32 %c
}
+define i32 @test_load_cast_combine_noalias_addrspace(ptr %ptr) {
+; Ensure (cast (load (...))) -> (load (cast (...))) preserves TBAA.
+; CHECK-LABEL: @test_load_cast_combine_noalias_addrspace(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[PTR:%.*]], align 4
+; CHECK-NEXT: ret i32 [[L1]]
+;
+entry:
+ %l = load float, ptr %ptr, align 4, !noalias.addrspace !11
+ %c = bitcast float %l to i32
+ ret i32 %c
+}
+
!0 = !{!1, !1, i64 0}
!1 = !{!"scalar type", !2}
!2 = !{!"root"}
@@ -184,3 +197,4 @@ define i32 @test_load_cast_combine_noundef(ptr %ptr) {
!8 = !{i32 1}
!9 = !{i64 8}
!10 = distinct !{}
+!11 = !{i32 5, i32 6}
diff --git a/llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll b/llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll
index cbf2924b281988..18aa5c9e044a98 100644
--- a/llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll
+++ b/llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll
@@ -316,10 +316,80 @@ out:
ret void
}
+define void @hoist_noalias_addrspace_both(i1 %c, ptr %p, i64 %val) {
+; CHECK-LABEL: @hoist_noalias_addrspace_both(
+; CHECK-NEXT: if:
+; CHECK-NEXT: [[T:%.*]] = atomicrmw add ptr [[P:%.*]], i64 [[VAL:%.*]] seq_cst, align 8
+; CHECK-NEXT: ret void
+;
+if:
+ br i1 %c, label %then, label %else
+
+then:
+ %t = atomicrmw add ptr %p, i64 %val seq_cst, !noalias.addrspace !4
+ br label %out
+
+else:
+ %e = atomicrmw add ptr %p, i64 %val seq_cst, !noalias.addrspace !4
+ br label %out
+
+out:
+ ret void
+}
+
+define void @hoist_noalias_addrspace_one(i1 %c, ptr %p, i64 %val) {
+; CHECK-LABEL: @hoist_noalias_addrspace_one(
+; CHECK-NEXT: if:
+; CHECK-NEXT: [[T:%.*]] = atomicrmw add ptr [[P:%.*]], i64 [[VAL:%.*]] seq_cst, align 8
+; CHECK-NEXT: ret void
+;
+if:
+ br i1 %c, label %then, label %else
+
+then:
+ %t = atomicrmw add ptr %p, i64 %val seq_cst, !noalias.addrspace !4
+ br label %out
+
+else:
+ %e = atomicrmw add ptr %p, i64 %val seq_cst
+ br label %out
+
+out:
+ ret void
+}
+
+define void @hoist_noalias_addrspace_switch(i64 %i, ptr %p, i64 %val) {
+; CHECK-LABEL: @hoist_noalias_addrspace_switch(
+; CHECK-NEXT: out:
+; CHECK-NEXT: [[T:%.*]] = atomicrmw add ptr [[P:%.*]], i64 [[VAL:%.*]] seq_cst, align 8
+; CHECK-NEXT: ret void
+;
+ switch i64 %i, label %bb0 [
+ i64 1, label %bb1
+ i64 2, label %bb2
+ ]
+bb0:
+ %t = atomicrmw add ptr %p, i64 %val seq_cst, !noalias.addrspace !4
+ br label %out
+bb1:
+ %e = atomicrmw add ptr %p, i64 %val seq_cst, !noalias.addrspace !5
+ br label %out
+bb2:
+ %f = atomicrmw add ptr %p, i64 %val seq_cst, !noalias.addrspace !6
+ br label %out
+out:
+ ret void
+}
+
+
!0 = !{ i8 0, i8 1 }
!1 = !{ i8 3, i8 5 }
!2 = !{}
!3 = !{ i8 7, i8 9 }
+!4 = !{i32 5, i32 6}
+!5 = !{i32 5, i32 7}
+!6 = !{i32 4, i32 8}
+
;.
; CHECK: [[RNG0]] = !{i8 0, i8 1, i8 3, i8 5}
; CHECK: [[RNG1]] = !{i8 0, i8 1, i8 3, i8 5, i8 7, i8 9}
>From 763f178a8e7d9cc10aafda3f95758282f18f883a Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Fri, 6 Sep 2024 19:09:43 +0400
Subject: [PATCH 5/6] Add another comment
---
llvm/docs/LangRef.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 9b91e4411f2464..d935642d57cc49 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -8074,7 +8074,7 @@ Example:
%alloca.cast = addrspacecast ptr addrspace(5) %alloca to ptr
%rmw.ub = atomicrmw and ptr %alloca.cast, i64 %value seq_cst, !noalias.addrspace !0
- !0 = !{i32 5, i32 6}
+ !0 = !{i32 5, i32 6} ; Exclude addrspace(5) only
This is intended for use on targets with a notion of generic address
>From 4a6df18058bdd70d17fe89d0f3bcec95350b4790 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Sun, 15 Sep 2024 16:34:29 +0400
Subject: [PATCH 6/6] Reword langref slightly
---
llvm/docs/LangRef.rst | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index d935642d57cc49..5527e4a8818a55 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -8052,10 +8052,10 @@ inlined call.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
The ``noalias.addrspace`` metadata is used to identify memory
-operations which cannot access a range of address spaces. It is
-attached to memory instructions, including :ref:`atomicrmw
-<i_atomicrmw>`, :ref:`cmpxchg <i_cmpxchg>`, and :ref:`call <i_call>`
-instructions.
+operations which cannot access objects allocated in a range of address
+spaces. It is attached to memory instructions, including
+:ref:`atomicrmw <i_atomicrmw>`, :ref:`cmpxchg <i_cmpxchg>`, and
+:ref:`call <i_call>` instructions.
This follows the same form as :ref:`range metadata <range-metadata>`,
except the field entries must be of type `i32`. The interpretation is
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