[clang] [llvm] [SystemZ] Add support for half (fp16) (PR #109164)

[Matt Arsenault via llvm-commits]

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@@ -1597,6 +1618,15 @@ bool SystemZTargetLowering::splitValueIntoRegisterParts(
     return true;
   }
 
+  // Convert f16 to f32 (Out-arg).
+  if (PartVT == MVT::f16) {
+    assert(NumParts == 1 && "");
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arsenm wrote:

Remove && "" or make it a meaningful message 

https://github.com/llvm/llvm-project/pull/109164