[llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

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llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-arm

Author: Chris Copeland (chrisnc)

<details>
<summary>Changes</summary>

Currently, compiling for eabihf with a CPU lacking floating-point
registers will silently use the soft-float ABI instead, even though the
Arm attributes section still has Tag_ABI_VFP_args: VFP registers, which
leads to silent ABI mismatches at link time.

Fixes #<!-- -->110383.


---
Full diff: https://github.com/llvm/llvm-project/pull/111334.diff


1 Files Affected:

- (modified) llvm/lib/Target/ARM/ARMTargetMachine.cpp (+5-1) 


``````````diff
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 7553778c574033..82927a7430b5d0 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -309,11 +309,15 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
     // function that reside in TargetOptions.
     resetTargetOptions(F);
     I = std::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle,
-                                        F.hasMinSize());
+                                       F.hasMinSize());
 
     if (!I->isThumb() && !I->hasARMOps())
       F.getContext().emitError("Function '" + F.getName() + "' uses ARM "
           "instructions, but the target does not support ARM mode execution.");
+
+    if (I->isTargetHardFloat() && !I->hasFPRegs())
+      F.getContext().emitError("The hardfloat ABI is enabled, but the target "
+                               "lacks floating-point registers.");
   }
 
   return I.get();

``````````

</details>


https://github.com/llvm/llvm-project/pull/111334