[lld] 5f63461 - [ELF] Pass Ctx & to SyntheticSections
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 6 17:23:21 PDT 2024
Author: Fangrui Song
Date: 2024-10-06T17:23:16-07:00
New Revision: 5f6346190cb09373164d5fed9409cf5eb1a01f76
URL: https://github.com/llvm/llvm-project/commit/5f6346190cb09373164d5fed9409cf5eb1a01f76
DIFF: https://github.com/llvm/llvm-project/commit/5f6346190cb09373164d5fed9409cf5eb1a01f76.diff
LOG: [ELF] Pass Ctx & to SyntheticSections
Added:
Modified:
lld/ELF/InputSection.h
lld/ELF/LinkerScript.cpp
lld/ELF/SyntheticSections.cpp
lld/ELF/SyntheticSections.h
lld/ELF/Writer.cpp
Removed:
################################################################################
diff --git a/lld/ELF/InputSection.h b/lld/ELF/InputSection.h
index 51449acd5cad06..bff9ec324d9bc5 100644
--- a/lld/ELF/InputSection.h
+++ b/lld/ELF/InputSection.h
@@ -477,10 +477,10 @@ class SyntheticSection : public InputSection {
virtual ~SyntheticSection() = default;
virtual size_t getSize(Ctx &) const = 0;
- virtual bool updateAllocSize() { return false; }
+ virtual bool updateAllocSize(Ctx &) { return false; }
// If the section has the SHF_ALLOC flag and the size may be changed if
// thunks are added, update the section size.
- virtual bool isNeeded() const { return true; }
+ virtual bool isNeeded(Ctx &) const { return true; }
virtual void finalizeContents(Ctx &) {}
virtual void writeTo(Ctx &, uint8_t *buf) = 0;
diff --git a/lld/ELF/LinkerScript.cpp b/lld/ELF/LinkerScript.cpp
index 2852c90fb57ef0..0ebc3b24d972da 100644
--- a/lld/ELF/LinkerScript.cpp
+++ b/lld/ELF/LinkerScript.cpp
@@ -1055,7 +1055,7 @@ void LinkerScript::diagnoseOrphanHandling() const {
}
void LinkerScript::diagnoseMissingSGSectionAddress() const {
- if (!ctx.arg.cmseImplib || !ctx.in.armCmseSGSection->isNeeded())
+ if (!ctx.arg.cmseImplib || !ctx.in.armCmseSGSection->isNeeded(ctx))
return;
OutputSection *sec = findByName(sectionCommands, ".gnu.sgstubs");
diff --git a/lld/ELF/SyntheticSections.cpp b/lld/ELF/SyntheticSections.cpp
index 5704129019a1b5..587c7333869b1c 100644
--- a/lld/ELF/SyntheticSections.cpp
+++ b/lld/ELF/SyntheticSections.cpp
@@ -108,7 +108,8 @@ void MipsAbiFlagsSection<ELFT>::writeTo(Ctx &ctx, uint8_t *buf) {
}
template <class ELFT>
-std::unique_ptr<MipsAbiFlagsSection<ELFT>> MipsAbiFlagsSection<ELFT>::create() {
+std::unique_ptr<MipsAbiFlagsSection<ELFT>>
+MipsAbiFlagsSection<ELFT>::create(Ctx &ctx) {
Elf_Mips_ABIFlags flags = {};
bool create = false;
@@ -175,7 +176,8 @@ void MipsOptionsSection<ELFT>::writeTo(Ctx &ctx, uint8_t *buf) {
}
template <class ELFT>
-std::unique_ptr<MipsOptionsSection<ELFT>> MipsOptionsSection<ELFT>::create() {
+std::unique_ptr<MipsOptionsSection<ELFT>>
+MipsOptionsSection<ELFT>::create(Ctx &ctx) {
// N64 ABI only.
if (!ELFT::Is64Bits)
return nullptr;
@@ -233,7 +235,8 @@ void MipsReginfoSection<ELFT>::writeTo(Ctx &ctx, uint8_t *buf) {
}
template <class ELFT>
-std::unique_ptr<MipsReginfoSection<ELFT>> MipsReginfoSection<ELFT>::create() {
+std::unique_ptr<MipsReginfoSection<ELFT>>
+MipsReginfoSection<ELFT>::create(Ctx &ctx) {
// Section should be alive for O32 and N32 ABIs only.
if (ELFT::Is64Bits)
return nullptr;
@@ -712,7 +715,7 @@ void GotSection::finalizeContents(Ctx &) {
size = numEntries * ctx.arg.wordsize;
}
-bool GotSection::isNeeded() const {
+bool GotSection::isNeeded(Ctx &ctx) const {
// Needed if the GOT symbol is used or the number of entries is more than just
// the header. A GOT with just the header may not be needed.
return hasGotOffRel || numEntries > ctx.target->gotHeaderEntriesNum;
@@ -872,9 +875,9 @@ bool MipsGotSection::tryMergeGots(FileGot &dst, FileGot &src, bool isPrimary) {
return true;
}
-void MipsGotSection::finalizeContents(Ctx &) { updateAllocSize(); }
+void MipsGotSection::finalizeContents(Ctx &) { updateAllocSize(ctx); }
-bool MipsGotSection::updateAllocSize() {
+bool MipsGotSection::updateAllocSize(Ctx &ctx) {
size = headerEntriesNum * ctx.arg.wordsize;
for (const FileGot &g : gots)
size += g.getEntriesNum() * ctx.arg.wordsize;
@@ -1084,7 +1087,7 @@ void MipsGotSection::build() {
}
}
-bool MipsGotSection::isNeeded() const {
+bool MipsGotSection::isNeeded(Ctx &ctx) const {
// We add the .got section to the result for dynamic MIPS target because
// its address and properties are mentioned in the .dynamic section.
return !ctx.arg.relocatable;
@@ -1197,7 +1200,7 @@ void GotPltSection::writeTo(Ctx &ctx, uint8_t *buf) {
}
}
-bool GotPltSection::isNeeded() const {
+bool GotPltSection::isNeeded(Ctx &) const {
// We need to emit GOTPLT even if it's empty if there's a relocation relative
// to it.
return !entries.empty() || hasGotPltOffRel;
@@ -1400,7 +1403,7 @@ DynamicSection<ELFT>::computeContents() {
if (!ctx.arg.shared && !ctx.arg.relocatable && !ctx.arg.zRodynamic)
addInt(DT_DEBUG, 0);
- if (part.relaDyn->isNeeded()) {
+ if (part.relaDyn->isNeeded(ctx)) {
addInSec(part.relaDyn->dynamicTag, *part.relaDyn);
entries.emplace_back(part.relaDyn->sizeDynamicTag,
addRelaSz(*part.relaDyn));
@@ -1433,7 +1436,7 @@ DynamicSection<ELFT>::computeContents() {
addInt(DT_AARCH64_AUTH_RELRSZ, part.relrAuthDyn->getParent()->size);
addInt(DT_AARCH64_AUTH_RELRENT, sizeof(Elf_Relr));
}
- if (isMain && ctx.in.relaPlt->isNeeded()) {
+ if (isMain && ctx.in.relaPlt->isNeeded(ctx)) {
addInSec(DT_JMPREL, *ctx.in.relaPlt);
entries.emplace_back(DT_PLTRELSZ, addPltRelSz());
switch (ctx.arg.emachine) {
@@ -1478,7 +1481,7 @@ DynamicSection<ELFT>::computeContents() {
addInt(DT_AARCH64_MEMTAG_MODE, ctx.arg.androidMemtagMode == NT_MEMTAG_LEVEL_ASYNC);
addInt(DT_AARCH64_MEMTAG_HEAP, ctx.arg.androidMemtagHeap);
addInt(DT_AARCH64_MEMTAG_STACK, ctx.arg.androidMemtagStack);
- if (ctx.mainPart->memtagGlobalDescriptors->isNeeded()) {
+ if (ctx.mainPart->memtagGlobalDescriptors->isNeeded(ctx)) {
addInSec(DT_AARCH64_MEMTAG_GLOBALS,
*ctx.mainPart->memtagGlobalDescriptors);
addInt(DT_AARCH64_MEMTAG_GLOBALSSZ,
@@ -1520,13 +1523,13 @@ DynamicSection<ELFT>::computeContents() {
addInt(DT_FINI, b->getVA());
}
- if (part.verSym && part.verSym->isNeeded())
+ if (part.verSym && part.verSym->isNeeded(ctx))
addInSec(DT_VERSYM, *part.verSym);
if (part.verDef && part.verDef->isLive()) {
addInSec(DT_VERDEF, *part.verDef);
addInt(DT_VERDEFNUM, getVerDefNum());
}
- if (part.verNeed && part.verNeed->isNeeded()) {
+ if (part.verNeed && part.verNeed->isNeeded(ctx)) {
addInSec(DT_VERNEED, *part.verNeed);
unsigned needNum = 0;
for (SharedFile *f : ctx.sharedFiles)
@@ -1563,7 +1566,7 @@ DynamicSection<ELFT>::computeContents() {
addInSec(DT_PPC_GOT, *ctx.in.got);
// Glink dynamic tag is required by the V2 abi if the plt section isn't empty.
- if (ctx.arg.emachine == EM_PPC64 && ctx.in.plt->isNeeded()) {
+ if (ctx.arg.emachine == EM_PPC64 && ctx.in.plt->isNeeded(ctx)) {
// The Glink tag points to 32 bytes before the first lazy symbol resolution
// stub, which starts directly after the header.
addInt(DT_PPC64_GLINK,
@@ -1780,7 +1783,7 @@ AndroidPackedRelocationSection<ELFT>::AndroidPackedRelocationSection(
}
template <class ELFT>
-bool AndroidPackedRelocationSection<ELFT>::updateAllocSize() {
+bool AndroidPackedRelocationSection<ELFT>::updateAllocSize(Ctx &ctx) {
// This function computes the contents of an Android-format packed relocation
// section.
//
@@ -2028,7 +2031,7 @@ RelrSection<ELFT>::RelrSection(unsigned concurrency, bool isAArch64Auth)
this->entsize = ctx.arg.wordsize;
}
-template <class ELFT> bool RelrSection<ELFT>::updateAllocSize() {
+template <class ELFT> bool RelrSection<ELFT>::updateAllocSize(Ctx &ctx) {
// This function computes the contents of an SHT_RELR packed relocation
// section.
//
@@ -2344,7 +2347,7 @@ void SymtabShndxSection::writeTo(Ctx &ctx, uint8_t *buf) {
}
}
-bool SymtabShndxSection::isNeeded() const {
+bool SymtabShndxSection::isNeeded(Ctx &ctx) const {
// SHT_SYMTAB can hold symbols with section indices values up to
// SHN_LORESERVE. If we need more, we want to use extension SHT_SYMTAB_SHNDX
// section. Problem is that we reveal the final section indices a bit too
@@ -2587,9 +2590,10 @@ size_t PltSection::getSize(Ctx &ctx) const {
return headerSize + entries.size() * ctx.target->pltEntrySize;
}
-bool PltSection::isNeeded() const {
+bool PltSection::isNeeded(Ctx &ctx) const {
// For -z retpolineplt, .iplt needs the .plt header.
- return !entries.empty() || (ctx.arg.zRetpolineplt && ctx.in.iplt->isNeeded());
+ return !entries.empty() ||
+ (ctx.arg.zRetpolineplt && ctx.in.iplt->isNeeded(ctx));
}
// Used by ARM to add mapping symbols in the PLT section, which aid
@@ -2722,7 +2726,9 @@ size_t IBTPltSection::getSize(Ctx &ctx) const {
return 16 + ctx.in.plt->getNumEntries() * ctx.target->pltEntrySize;
}
-bool IBTPltSection::isNeeded() const { return ctx.in.plt->getNumEntries() > 0; }
+bool IBTPltSection::isNeeded(Ctx &ctx) const {
+ return ctx.in.plt->getNumEntries() > 0;
+}
RelroPaddingSection::RelroPaddingSection()
: SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_NOBITS, 1, ".relro_padding") {
@@ -3624,7 +3630,7 @@ void GdbIndexSection::writeTo(Ctx &ctx, uint8_t *buf) {
}
}
-bool GdbIndexSection::isNeeded() const { return !chunks.empty(); }
+bool GdbIndexSection::isNeeded(Ctx &) const { return !chunks.empty(); }
EhFrameHeader::EhFrameHeader()
: SyntheticSection(SHF_ALLOC, SHT_PROGBITS, 4, ".eh_frame_hdr") {}
@@ -3667,8 +3673,8 @@ size_t EhFrameHeader::getSize(Ctx &ctx) const {
return 12 + getPartition().ehFrame->numFdes * 8;
}
-bool EhFrameHeader::isNeeded() const {
- return isLive() && getPartition().ehFrame->isNeeded();
+bool EhFrameHeader::isNeeded(Ctx &ctx) const {
+ return isLive() && getPartition().ehFrame->isNeeded(ctx);
}
VersionDefinitionSection::VersionDefinitionSection()
@@ -3760,9 +3766,9 @@ void VersionTableSection::writeTo(Ctx &ctx, uint8_t *buf) {
}
}
-bool VersionTableSection::isNeeded() const {
+bool VersionTableSection::isNeeded(Ctx &ctx) const {
return isLive() &&
- (getPartition().verDef || getPartition().verNeed->isNeeded());
+ (getPartition().verDef || getPartition().verNeed->isNeeded(ctx));
}
void elf::addVerneed(Symbol *ss) {
@@ -3857,7 +3863,7 @@ template <class ELFT> size_t VersionNeedSection<ELFT>::getSize(Ctx &ctx) const {
SharedFile::vernauxNum * sizeof(Elf_Vernaux);
}
-template <class ELFT> bool VersionNeedSection<ELFT>::isNeeded() const {
+template <class ELFT> bool VersionNeedSection<ELFT>::isNeeded(Ctx &) const {
return isLive() && SharedFile::vernauxNum != 0;
}
@@ -4216,7 +4222,7 @@ void ARMExidxSyntheticSection::writeTo(Ctx &ctx, uint8_t *buf) {
assert(size == offset + 8);
}
-bool ARMExidxSyntheticSection::isNeeded() const {
+bool ARMExidxSyntheticSection::isNeeded(Ctx &) const {
return llvm::any_of(exidxSections,
[](InputSection *isec) { return isec->isLive(); });
}
@@ -4268,7 +4274,7 @@ bool ThunkSection::assignOffsets() {
PPC32Got2Section::PPC32Got2Section()
: SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS, 4, ".got2") {}
-bool PPC32Got2Section::isNeeded() const {
+bool PPC32Got2Section::isNeeded(Ctx &) const {
// See the comment below. This is not needed if there is no other
// InputSection.
for (SectionCommand *cmd : getParent()->commands)
@@ -4341,7 +4347,7 @@ void PPC64LongBranchTargetSection::writeTo(Ctx &ctx, uint8_t *buf) {
}
}
-bool PPC64LongBranchTargetSection::isNeeded() const {
+bool PPC64LongBranchTargetSection::isNeeded(Ctx &) const {
// `removeUnusedSyntheticSections()` is called before thunk allocation which
// is too early to determine if this section will be empty or not. We need
// Finalized to keep the section alive until after thunk creation. Finalized
@@ -4622,7 +4628,7 @@ createMemtagGlobalDescriptors(const SmallVector<const Symbol *, 0> &symbols,
return sectionSize;
}
-bool MemtagGlobalDescriptors::updateAllocSize() {
+bool MemtagGlobalDescriptors::updateAllocSize(Ctx &ctx) {
size_t oldSize = getSize(ctx);
std::stable_sort(symbols.begin(), symbols.end(),
[](const Symbol *s1, const Symbol *s2) {
@@ -4704,11 +4710,11 @@ template <class ELFT> void elf::createSyntheticSections(Ctx &ctx) {
ctx.in.mipsRldMap = std::make_unique<MipsRldMapSection>();
add(*ctx.in.mipsRldMap);
}
- if ((ctx.in.mipsAbiFlags = MipsAbiFlagsSection<ELFT>::create()))
+ if ((ctx.in.mipsAbiFlags = MipsAbiFlagsSection<ELFT>::create(ctx)))
add(*ctx.in.mipsAbiFlags);
- if ((ctx.in.mipsOptions = MipsOptionsSection<ELFT>::create()))
+ if ((ctx.in.mipsOptions = MipsOptionsSection<ELFT>::create(ctx)))
add(*ctx.in.mipsOptions);
- if ((ctx.in.mipsReginfo = MipsReginfoSection<ELFT>::create()))
+ if ((ctx.in.mipsReginfo = MipsReginfoSection<ELFT>::create(ctx)))
add(*ctx.in.mipsReginfo);
}
diff --git a/lld/ELF/SyntheticSections.h b/lld/ELF/SyntheticSections.h
index 7383388858e497..a40e091500545a 100644
--- a/lld/ELF/SyntheticSections.h
+++ b/lld/ELF/SyntheticSections.h
@@ -53,7 +53,7 @@ class EhFrameSection final : public SyntheticSection {
EhFrameSection();
void writeTo(Ctx &, uint8_t *buf) override;
void finalizeContents(Ctx &) override;
- bool isNeeded() const override { return !sections.empty(); }
+ bool isNeeded(Ctx &) const override { return !sections.empty(); }
size_t getSize(Ctx &ctx) const override { return size; }
static bool classof(const SectionBase *d) {
@@ -107,7 +107,7 @@ class GotSection final : public SyntheticSection {
GotSection();
size_t getSize(Ctx &ctx) const override { return size; }
void finalizeContents(Ctx &) override;
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
void writeTo(Ctx &, uint8_t *buf) override;
void addConstant(const Relocation &r);
@@ -173,7 +173,7 @@ class BssSection final : public SyntheticSection {
public:
BssSection(StringRef name, uint64_t size, uint32_t addralign);
void writeTo(Ctx &, uint8_t *) override {}
- bool isNeeded() const override { return size != 0; }
+ bool isNeeded(Ctx &) const override { return size != 0; }
size_t getSize(Ctx &ctx) const override { return size; }
static bool classof(const SectionBase *s) { return s->bss; }
@@ -185,9 +185,9 @@ class MipsGotSection final : public SyntheticSection {
MipsGotSection();
void writeTo(Ctx &, uint8_t *buf) override;
size_t getSize(Ctx &ctx) const override { return size; }
- bool updateAllocSize() override;
+ bool updateAllocSize(Ctx &) override;
void finalizeContents(Ctx &) override;
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
// Join separate GOTs built for each input file to generate
// primary and optional multiple secondary GOTs.
@@ -363,7 +363,7 @@ class GotPltSection final : public SyntheticSection {
void addEntry(Symbol &sym);
size_t getSize(Ctx &) const override;
void writeTo(Ctx &, uint8_t *buf) override;
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
// Flag to force GotPlt to be in output if we have relocations
// that relies on its address.
@@ -383,7 +383,7 @@ class IgotPltSection final : public SyntheticSection {
void addEntry(Symbol &sym);
size_t getSize(Ctx &) const override;
void writeTo(Ctx &, uint8_t *buf) override;
- bool isNeeded() const override { return !entries.empty(); }
+ bool isNeeded(Ctx &) const override { return !entries.empty(); }
private:
SmallVector<const Symbol *, 0> entries;
@@ -537,7 +537,7 @@ class RelocationBaseSection : public SyntheticSection {
sec.addReloc({expr, addendRelType, offsetInSec, addend, &sym});
addReloc<shard>({dynType, &sec, offsetInSec, kind, sym, addend, expr});
}
- bool isNeeded() const override {
+ bool isNeeded(Ctx &) const override {
return !relocs.empty() ||
llvm::any_of(relocsVec, [](auto &v) { return !v.empty(); });
}
@@ -590,7 +590,7 @@ class AndroidPackedRelocationSection final : public RelocationBaseSection {
public:
AndroidPackedRelocationSection(StringRef name, unsigned concurrency);
- bool updateAllocSize() override;
+ bool updateAllocSize(Ctx &) override;
size_t getSize(Ctx &ctx) const override { return relocData.size(); }
void writeTo(Ctx &, uint8_t *buf) override {
memcpy(buf, relocData.data(), relocData.size());
@@ -613,7 +613,7 @@ class RelrBaseSection : public SyntheticSection {
public:
RelrBaseSection(unsigned concurrency, bool isAArch64Auth = false);
void mergeRels();
- bool isNeeded() const override {
+ bool isNeeded(Ctx &) const override {
return !relocs.empty() ||
llvm::any_of(relocsVec, [](auto &v) { return !v.empty(); });
}
@@ -624,14 +624,14 @@ class RelrBaseSection : public SyntheticSection {
// RelrSection is used to encode offsets for relative relocations.
// Proposal for adding SHT_RELR sections to generic-abi is here:
// https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg
-// For more details, see the comment in RelrSection::updateAllocSize().
+// For more details, see the comment in RelrSection::updateAllocSize(Ctx &ctx).
template <class ELFT> class RelrSection final : public RelrBaseSection {
using Elf_Relr = typename ELFT::Relr;
public:
RelrSection(unsigned concurrency, bool isAArch64Auth = false);
- bool updateAllocSize() override;
+ bool updateAllocSize(Ctx &) override;
size_t getSize(Ctx &ctx) const override {
return relrRelocs.size() * this->entsize;
}
@@ -686,7 +686,7 @@ class SymtabShndxSection final : public SyntheticSection {
void writeTo(Ctx &, uint8_t *buf) override;
size_t getSize(Ctx &) const override;
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
void finalizeContents(Ctx &) override;
};
@@ -747,7 +747,7 @@ class PltSection : public SyntheticSection {
PltSection();
void writeTo(Ctx &, uint8_t *buf) override;
size_t getSize(Ctx &) const override;
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
void addSymbols();
void addEntry(Symbol &sym);
size_t getNumEntries() const { return entries.size(); }
@@ -768,7 +768,7 @@ class IpltSection final : public SyntheticSection {
IpltSection();
void writeTo(Ctx &, uint8_t *buf) override;
size_t getSize(Ctx &) const override;
- bool isNeeded() const override { return !entries.empty(); }
+ bool isNeeded(Ctx &) const override { return !entries.empty(); }
void addSymbols();
void addEntry(Symbol &sym);
};
@@ -788,7 +788,7 @@ class IBTPltSection : public SyntheticSection {
public:
IBTPltSection();
void writeTo(Ctx &, uint8_t *Buf) override;
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
size_t getSize(Ctx &) const override;
};
@@ -874,7 +874,7 @@ class DebugNamesBaseSection : public SyntheticSection {
DebugNamesBaseSection();
size_t getSize(Ctx &ctx) const override { return size; }
- bool isNeeded() const override { return numChunks > 0; }
+ bool isNeeded(Ctx &) const override { return numChunks > 0; }
protected:
void init(llvm::function_ref<void(InputFile *, InputChunk &, OutputChunk &)>);
@@ -967,7 +967,7 @@ class GdbIndexSection final : public SyntheticSection {
template <typename ELFT> static std::unique_ptr<GdbIndexSection> create();
void writeTo(Ctx &, uint8_t *buf) override;
size_t getSize(Ctx &ctx) const override { return size; }
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
private:
struct GdbIndexHeader {
@@ -1006,7 +1006,7 @@ class EhFrameHeader final : public SyntheticSection {
void write();
void writeTo(Ctx &, uint8_t *buf) override;
size_t getSize(Ctx &) const override;
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
};
// For more information about .gnu.version and .gnu.version_r see:
@@ -1045,7 +1045,7 @@ class VersionTableSection final : public SyntheticSection {
void finalizeContents(Ctx &) override;
size_t getSize(Ctx &) const override;
void writeTo(Ctx &, uint8_t *buf) override;
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
};
// The .gnu.version_r section defines the version identifiers used by
@@ -1076,7 +1076,7 @@ class VersionNeedSection final : public SyntheticSection {
void finalizeContents(Ctx &) override;
void writeTo(Ctx &, uint8_t *buf) override;
size_t getSize(Ctx &) const override;
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
};
// MergeSyntheticSection is a class that allows us to put mergeable sections
@@ -1143,7 +1143,7 @@ class MipsAbiFlagsSection final : public SyntheticSection {
using Elf_Mips_ABIFlags = llvm::object::Elf_Mips_ABIFlags<ELFT>;
public:
- static std::unique_ptr<MipsAbiFlagsSection> create();
+ static std::unique_ptr<MipsAbiFlagsSection> create(Ctx &);
MipsAbiFlagsSection(Elf_Mips_ABIFlags flags);
size_t getSize(Ctx &ctx) const override { return sizeof(Elf_Mips_ABIFlags); }
@@ -1159,7 +1159,7 @@ template <class ELFT> class MipsOptionsSection final : public SyntheticSection {
using Elf_Mips_RegInfo = llvm::object::Elf_Mips_RegInfo<ELFT>;
public:
- static std::unique_ptr<MipsOptionsSection<ELFT>> create();
+ static std::unique_ptr<MipsOptionsSection<ELFT>> create(Ctx &);
MipsOptionsSection(Elf_Mips_RegInfo reginfo);
void writeTo(Ctx &, uint8_t *buf) override;
@@ -1177,7 +1177,7 @@ template <class ELFT> class MipsReginfoSection final : public SyntheticSection {
using Elf_Mips_RegInfo = llvm::object::Elf_Mips_RegInfo<ELFT>;
public:
- static std::unique_ptr<MipsReginfoSection> create();
+ static std::unique_ptr<MipsReginfoSection> create(Ctx &);
MipsReginfoSection(Elf_Mips_RegInfo reginfo);
size_t getSize(Ctx &ctx) const override { return sizeof(Elf_Mips_RegInfo); }
@@ -1242,7 +1242,7 @@ class ARMExidxSyntheticSection : public SyntheticSection {
size_t getSize(Ctx &ctx) const override { return size; }
void writeTo(Ctx &, uint8_t *buf) override;
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
// Sort and remove duplicate entries.
void finalizeContents(Ctx &) override;
InputSection *getLinkOrderDep() const;
@@ -1312,7 +1312,7 @@ class ArmCmseSGVeneer;
class ArmCmseSGSection final : public SyntheticSection {
public:
ArmCmseSGSection(Ctx &ctx);
- bool isNeeded() const override { return !entries.empty(); }
+ bool isNeeded(Ctx &) const override { return !entries.empty(); }
size_t getSize(Ctx &) const override;
void writeTo(Ctx &, uint8_t *buf) override;
void addSGVeneer(Symbol *sym, Symbol *ext_sym);
@@ -1334,7 +1334,7 @@ class PPC32Got2Section final : public SyntheticSection {
public:
PPC32Got2Section();
size_t getSize(Ctx &ctx) const override { return 0; }
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
void finalizeContents(Ctx &) override;
void writeTo(Ctx &, uint8_t *buf) override {}
};
@@ -1351,7 +1351,7 @@ class PPC64LongBranchTargetSection final : public SyntheticSection {
std::optional<uint32_t> addEntry(const Symbol *sym, int64_t addend);
size_t getSize(Ctx &) const override;
void writeTo(Ctx &, uint8_t *buf) override;
- bool isNeeded() const override;
+ bool isNeeded(Ctx &) const override;
void finalizeContents(Ctx &) override { finalized = true; }
private:
@@ -1417,15 +1417,13 @@ class MemtagGlobalDescriptors final : public SyntheticSection {
// varint-compressed list of pointers to global variables. We only know the
// final size after `finalizeAddressDependentContent()`.
size_t getSize(Ctx &) const override;
- bool updateAllocSize() override;
+ bool updateAllocSize(Ctx &) override;
void addSymbol(const Symbol &sym) {
symbols.push_back(&sym);
}
- bool isNeeded() const override {
- return !symbols.empty();
- }
+ bool isNeeded(Ctx &) const override { return !symbols.empty(); }
private:
SmallVector<const Symbol *, 0> symbols;
diff --git a/lld/ELF/Writer.cpp b/lld/ELF/Writer.cpp
index 6519cfbd08b3fb..72b6276913e6d6 100644
--- a/lld/ELF/Writer.cpp
+++ b/lld/ELF/Writer.cpp
@@ -837,7 +837,7 @@ template <class ELFT> void Writer<ELFT>::setReservedSymbolSections() {
}
// .rela_iplt_{start,end} mark the start and the end of .rel[a].dyn.
- if (ctx.sym.relaIpltStart && ctx.mainPart->relaDyn->isNeeded()) {
+ if (ctx.sym.relaIpltStart && ctx.mainPart->relaDyn->isNeeded(ctx)) {
ctx.sym.relaIpltStart->section = ctx.mainPart->relaDyn.get();
ctx.sym.relaIpltEnd->section = ctx.mainPart->relaDyn.get();
ctx.sym.relaIpltEnd->value = ctx.mainPart->relaDyn->getSize(ctx);
@@ -1425,7 +1425,7 @@ template <class ELFT> void Writer<ELFT>::resolveShfLinkOrder() {
}
static void finalizeSynthetic(Ctx &ctx, SyntheticSection *sec) {
- if (sec && sec->isNeeded() && sec->getParent()) {
+ if (sec && sec->isNeeded(ctx) && sec->getParent()) {
llvm::TimeTraceScope timeScope("Finalize synthetic sections", sec->name);
sec->finalizeContents(ctx);
}
@@ -1488,7 +1488,7 @@ template <class ELFT> void Writer<ELFT>::finalizeAddressDependentContent() {
finalizeSynthetic(ctx, ctx.in.got.get());
if (ctx.in.mipsGot)
- ctx.in.mipsGot->updateAllocSize();
+ ctx.in.mipsGot->updateAllocSize(ctx);
for (Partition &part : ctx.partitions) {
// The R_AARCH64_AUTH_RELATIVE has a smaller addend field as bits [63:32]
@@ -1513,13 +1513,13 @@ template <class ELFT> void Writer<ELFT>::finalizeAddressDependentContent() {
part.relrAuthDyn->relocs.erase(it, part.relrAuthDyn->relocs.end());
}
if (part.relaDyn)
- changed |= part.relaDyn->updateAllocSize();
+ changed |= part.relaDyn->updateAllocSize(ctx);
if (part.relrDyn)
- changed |= part.relrDyn->updateAllocSize();
+ changed |= part.relrDyn->updateAllocSize(ctx);
if (part.relrAuthDyn)
- changed |= part.relrAuthDyn->updateAllocSize();
+ changed |= part.relrAuthDyn->updateAllocSize(ctx);
if (part.memtagGlobalDescriptors)
- changed |= part.memtagGlobalDescriptors->updateAllocSize();
+ changed |= part.memtagGlobalDescriptors->updateAllocSize(ctx);
}
std::pair<const OutputSection *, const Defined *> changes =
@@ -1679,7 +1679,7 @@ static void removeUnusedSyntheticSections(Ctx &ctx) {
auto end =
std::remove_if(start, ctx.inputSections.end(), [&](InputSectionBase *s) {
auto *sec = cast<SyntheticSection>(s);
- if (sec->getParent() && sec->isNeeded())
+ if (sec->getParent() && sec->isNeeded(ctx))
return false;
// .relr.auth.dyn relocations may be moved to .rela.dyn in
// finalizeAddressDependentContent, making .rela.dyn no longer empty.
@@ -1810,9 +1810,9 @@ template <class ELFT> void Writer<ELFT>::finalizeSections() {
reportUndefinedSymbols(ctx);
postScanRelocations(ctx);
- if (ctx.in.plt && ctx.in.plt->isNeeded())
+ if (ctx.in.plt && ctx.in.plt->isNeeded(ctx))
ctx.in.plt->addSymbols();
- if (ctx.in.iplt && ctx.in.iplt->isNeeded())
+ if (ctx.in.iplt && ctx.in.iplt->isNeeded(ctx))
ctx.in.iplt->addSymbols();
if (ctx.arg.unresolvedSymbolsInShlib != UnresolvedPolicy::Ignore) {
@@ -2312,7 +2312,7 @@ SmallVector<PhdrEntry *, 0> Writer<ELFT>::createPhdrs(Partition &part) {
ret.push_back(relRo);
// PT_GNU_EH_FRAME is a special section pointing on .eh_frame_hdr.
- if (part.ehFrame->isNeeded() && part.ehFrameHdr &&
+ if (part.ehFrame->isNeeded(ctx) && part.ehFrameHdr &&
part.ehFrame->getParent() && part.ehFrameHdr->getParent())
addHdr(PT_GNU_EH_FRAME, part.ehFrameHdr->getParent()->getPhdrFlags())
->add(part.ehFrameHdr->getParent());
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