[llvm] 56757e5 - [X86] combineAndLoadToBZHI - don't do an return early return if we fail to match a load

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2024-10-06T17:29:33+01:00
New Revision: 56757e52ebbd79af540c23b00abb13c9bf5f2d60

URL: https://github.com/llvm/llvm-project/commit/56757e52ebbd79af540c23b00abb13c9bf5f2d60
DIFF: https://github.com/llvm/llvm-project/commit/56757e52ebbd79af540c23b00abb13c9bf5f2d60.diff

LOG: [X86] combineAndLoadToBZHI - don't do an return early return if we fail to match a load

Just continue so we can test the commutated pattern as well.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/replace-load-and-with-bzhi.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 5b494842d1d475..393915cf8795ed 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -50027,17 +50027,14 @@ static SDValue getIndexFromUnindexedLoad(LoadSDNode *Ld) {
     return SDValue();
 
   SDValue Base = Ld->getBasePtr();
-
   if (Base.getOpcode() != ISD::ADD)
     return SDValue();
 
   SDValue ShiftedIndex = Base.getOperand(0);
-
   if (ShiftedIndex.getOpcode() != ISD::SHL)
     return SDValue();
 
   return ShiftedIndex.getOperand(0);
-
 }
 
 static bool hasBZHI(const X86Subtarget &Subtarget, MVT VT) {
@@ -50066,22 +50063,21 @@ static SDValue combineAndLoadToBZHI(SDNode *Node, SelectionDAG &DAG,
 
   // Try matching the pattern for both operands.
   for (unsigned i = 0; i < 2; i++) {
-    SDValue N = Node->getOperand(i);
-    LoadSDNode *Ld = dyn_cast<LoadSDNode>(N.getNode());
-
-     // continue if the operand is not a load instruction
+    // continue if the operand is not a load instruction
+    auto *Ld = dyn_cast<LoadSDNode>(Node->getOperand(i));
     if (!Ld)
-      return SDValue();
-
+      continue;
     const Value *MemOp = Ld->getMemOperand()->getValue();
-
     if (!MemOp)
-      return SDValue();
+      continue;
+    // Get the Node which indexes into the array.
+    SDValue Index = getIndexFromUnindexedLoad(Ld);
+    if (!Index)
+      continue;
 
-    if (const GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(MemOp)) {
-      if (GlobalVariable *GV = dyn_cast<GlobalVariable>(GEP->getOperand(0))) {
+    if (auto *GEP = dyn_cast<GetElementPtrInst>(MemOp)) {
+      if (auto *GV = dyn_cast<GlobalVariable>(GEP->getOperand(0))) {
         if (GV->isConstant() && GV->hasDefinitiveInitializer()) {
-
           Constant *Init = GV->getInitializer();
           Type *Ty = Init->getType();
           if (!isa<ConstantDataArray>(Init) ||
@@ -50109,21 +50105,15 @@ static SDValue combineAndLoadToBZHI(SDNode *Node, SelectionDAG &DAG,
           // -> (and (load arr[idx]), inp)
           // <- (and (srl 0xFFFFFFFF, (sub 32, idx)))
           //    that will be replaced with one bzhi instruction.
-          SDValue Inp = (i == 0) ? Node->getOperand(1) : Node->getOperand(0);
+          SDValue Inp = Node->getOperand(i == 0 ? 1 : 0);
           SDValue SizeC = DAG.getConstant(VT.getSizeInBits(), dl, MVT::i32);
 
-          // Get the Node which indexes into the array.
-          SDValue Index = getIndexFromUnindexedLoad(Ld);
-          if (!Index)
-            return SDValue();
           Index = DAG.getZExtOrTrunc(Index, dl, MVT::i32);
-
           SDValue Sub = DAG.getNode(ISD::SUB, dl, MVT::i32, SizeC, Index);
           Sub = DAG.getNode(ISD::TRUNCATE, dl, MVT::i8, Sub);
 
           SDValue AllOnes = DAG.getAllOnesConstant(dl, VT);
           SDValue LShr = DAG.getNode(ISD::SRL, dl, VT, AllOnes, Sub);
-
           return DAG.getNode(ISD::AND, dl, VT, Inp, LShr);
         }
       }

diff  --git a/llvm/test/CodeGen/X86/replace-load-and-with-bzhi.ll b/llvm/test/CodeGen/X86/replace-load-and-with-bzhi.ll
index 46fe1b95afaad4..a0bd35d5d219bc 100644
--- a/llvm/test/CodeGen/X86/replace-load-and-with-bzhi.ll
+++ b/llvm/test/CodeGen/X86/replace-load-and-with-bzhi.ll
@@ -29,16 +29,13 @@ entry:
 define i32 @f32_bzhi_commute(i32 %x, i32 %y) local_unnamed_addr {
 ; X64-LABEL: f32_bzhi_commute:
 ; X64:       # %bb.0: # %entry
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    movslq %esi, %rcx
-; X64-NEXT:    andl fill_table32(,%rcx,4), %eax
+; X64-NEXT:    bzhil %esi, %edi, %eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: f32_bzhi_commute:
 ; X86:       # %bb.0: # %entry
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    andl fill_table32(,%ecx,4), %eax
+; X86-NEXT:    bzhil %eax, {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    retl
 entry:
   %idxprom = sext i32 %y to i64
@@ -70,16 +67,13 @@ entry:
 define i32 @f32_bzhi_partial_commute(i32 %x, i32 %y) local_unnamed_addr {
 ; X64-LABEL: f32_bzhi_partial_commute:
 ; X64:       # %bb.0: # %entry
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    movslq %esi, %rcx
-; X64-NEXT:    andl fill_table32_partial(,%rcx,4), %eax
+; X64-NEXT:    bzhil %esi, %edi, %eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: f32_bzhi_partial_commute:
 ; X86:       # %bb.0: # %entry
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    andl fill_table32_partial(,%ecx,4), %eax
+; X86-NEXT:    bzhil %eax, {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    retl
 entry:
   %idxprom = sext i32 %y to i64
@@ -113,8 +107,7 @@ entry:
 define i64 @f64_bzhi_commute(i64 %x, i64 %y) local_unnamed_addr {
 ; X64-LABEL: f64_bzhi_commute:
 ; X64:       # %bb.0: # %entry
-; X64-NEXT:    movq %rdi, %rax
-; X64-NEXT:    andq fill_table64(,%rsi,8), %rax
+; X64-NEXT:    bzhiq %rsi, %rdi, %rax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: f64_bzhi_commute:
@@ -156,8 +149,7 @@ entry:
 define i64 @f64_bzhi_partial_commute(i64 %x, i64 %y) local_unnamed_addr {
 ; X64-LABEL: f64_bzhi_partial_commute:
 ; X64:       # %bb.0: # %entry
-; X64-NEXT:    movq %rdi, %rax
-; X64-NEXT:    andq fill_table64_partial(,%rsi,8), %rax
+; X64-NEXT:    bzhiq %rsi, %rdi, %rax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: f64_bzhi_partial_commute: