[llvm] AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support (PR #107855)

[YunQiang Su via llvm-commits]

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@@ -0,0 +1,190 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=aarch64 --mattr=+fullfp16 < %s | FileCheck %s --check-prefix=AARCH64
+
+define <2 x double> @max_nnan_v2f64(<2 x double> %a, <2 x double> %b) {
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wzssyqa wrote:

For `multiples of the legal vector sizes`, I think that I have done them:
we have v4f64, v8f32, v16f16 here, and the length of NEON is 128bit.

https://github.com/llvm/llvm-project/pull/107855