[llvm] [GlobalISel][AArch64] Legalize G_ADD, G_SUB, G_AND, G_OR, and G_XOR for SVE (PR #110561)

[Thorsten Schütt via llvm-commits]

tschuett wrote:

The  **complete** error message about importing MUL_ZZZ:
```
Included from llvm/lib/Target/AArch64/AArch64.td:37:
Included from llvm/lib/Target/AArch64/AArch64InstrInfo.td:1035:
llvm/lib/Target/AArch64/SVEInstrFormats.td:3694:3: warning: Skipped pattern: Pattern operator lacks an equivalent Instruction (AArch64ISD::MUL_PRED)
  def : SVE_2_Op_Pat<nxv16i8, op, nxv16i8, nxv16i8, !cast<Instruction>(NAME # _B)>;
  ^
Included from llvm/lib/Target/AArch64/AArch64.td:37:
Included from llvm/lib/Target/AArch64/AArch64InstrInfo.td:10288:
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:3491:21: note: instantiated from multiclass
  defm MUL_ZZZ    : sve2_int_mul<0b000,  "mul",   AArch64mul>;
                    ^
Included from llvm/lib/Target/AArch64/AArch64.td:37:
Included from llvm/lib/Target/AArch64/AArch64InstrInfo.td:1035:
llvm/lib/Target/AArch64/SVEInstrFormats.td:3695:3: warning: Skipped pattern: Pattern operator lacks an equivalent Instruction (AArch64ISD::MUL_PRED)
  def : SVE_2_Op_Pat<nxv8i16, op, nxv8i16, nxv8i16, !cast<Instruction>(NAME # _H)>;
  ^
Included from llvm/lib/Target/AArch64/AArch64.td:37:
Included from llvm/lib/Target/AArch64/AArch64InstrInfo.td:10288:
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:3491:21: note: instantiated from multiclass
  defm MUL_ZZZ    : sve2_int_mul<0b000,  "mul",   AArch64mul>;
                    ^
Included from llvm/lib/Target/AArch64/AArch64.td:37:
Included from llvm/lib/Target/AArch64/AArch64InstrInfo.td:1035:
llvm/lib/Target/AArch64/SVEInstrFormats.td:3696:3: warning: Skipped pattern: Pattern operator lacks an equivalent Instruction (AArch64ISD::MUL_PRED)
  def : SVE_2_Op_Pat<nxv4i32, op, nxv4i32, nxv4i32, !cast<Instruction>(NAME # _S)>;
  ^
Included from llvm/lib/Target/AArch64/AArch64.td:37:
Included from llvm/lib/Target/AArch64/AArch64InstrInfo.td:10288:
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:3491:21: note: instantiated from multiclass
  defm MUL_ZZZ    : sve2_int_mul<0b000,  "mul",   AArch64mul>;
                    ^
Included from llvm/lib/Target/AArch64/AArch64.td:37:
Included from llvm/lib/Target/AArch64/AArch64InstrInfo.td:1035:
llvm/lib/Target/AArch64/SVEInstrFormats.td:3697:3: warning: Skipped pattern: Pattern operator lacks an equivalent Instruction (AArch64ISD::MUL_PRED)
  def : SVE_2_Op_Pat<nxv2i64, op, nxv2i64, nxv2i64, !cast<Instruction>(NAME # _D)>;
  ^
Included from llvm/lib/Target/AArch64/AArch64.td:37:
Included from llvm/lib/Target/AArch64/AArch64InstrInfo.td:10288:
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:3491:21: note: instantiated from multiclass
  defm MUL_ZZZ    : sve2_int_mul<0b000,  "mul",   AArch64mul>;
```

https://github.com/llvm/llvm-project/pull/110561