[llvm] c611049 - [RISCV] Use THShift_ri class instead of RVBShift_ri for TH_TST instruction. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sat Oct 5 11:57:51 PDT 2024


Author: Craig Topper
Date: 2024-10-05T11:52:10-07:00
New Revision: c6110496b346d7963f8f9f62a7d2696da12a943e

URL: https://github.com/llvm/llvm-project/commit/c6110496b346d7963f8f9f62a7d2696da12a943e
DIFF: https://github.com/llvm/llvm-project/commit/c6110496b346d7963f8f9f62a7d2696da12a943e.diff

LOG: [RISCV] Use THShift_ri class instead of RVBShift_ri for TH_TST instruction. NFC

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
index c0fe624a9b709c..90747a6b745cfc 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
@@ -270,7 +270,7 @@ def TH_REVW : THRev_r<0b10010, 0b00, "th.revw">;
 
 let Predicates = [HasVendorXTHeadBs], DecoderNamespace = "XTHeadBs",
     IsSignExtendingOpW = 1 in
-def TH_TST : RVBShift_ri<0b10001, 0b001, OPC_CUSTOM_0, "th.tst">,
+def TH_TST : THShift_ri<0b10001, 0b001, "th.tst">,
              Sched<[WriteSingleBitImm, ReadSingleBitImm]>;
 
 let Predicates = [HasVendorXTHeadCondMov] in {


        


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