[llvm] [GlobalISel][AArch64] Legalize G_ADD, G_SUB, G_AND, G_OR, and G_XOR for SVE (PR #110561)

[Thorsten Schütt via llvm-commits]

tschuett wrote:

```
(base) llvm-project2 % ag "\(ADD_ZZZ_H" lib/Target/AArch64/AArch64GenGlobalISel.inc
8233:      // (add:{ *:[nxv8i16] } nxv8i16:{ *:[nxv8i16] }:$Op1, nxv8i16:{ *:[nxv8i16] }:$Op2)  =>  (ADD_ZZZ_H:{ *:[nxv8i16] } ?:{ *:[nxv8i16] }:$Op1, ?:{ *:[nxv8i16] }:$Op2)
(base)  llvm-project2 % ag "\(SUB_ZZZ_H" lib/Target/AArch64/AArch64GenGlobalISel.inc
10643:      // (sub:{ *:[nxv8i16] } nxv8i16:{ *:[nxv8i16] }:$Op1, nxv8i16:{ *:[nxv8i16] }:$Op2)  =>  (SUB_ZZZ_H:{ *:[nxv8i16] } ?:{ *:[nxv8i16] }:$Op1, ?:{ *:[nxv8i16] }:$Op2)
(base) llvm-project2 % ag "\(MUL_ZZZ_H" lib/Target/AArch64/AArch64GenGlobalISel.inc
```

There indeed patterns missing for the SVE G_MUL.

https://github.com/llvm/llvm-project/pull/110561