[llvm] [RISCV][GISEL] instruction-select for G_SPLAT_VECTOR (PR #111193)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 4 14:02:29 PDT 2024
topperc wrote:
> > I don't follow. SelectionDAG is turning ISD::SPLAT_VECTOR into RISCVISD::VMV_V_X_VL or RISCVISD::VFMV_V_X_VL. We're never matching selected opcodes.
>
> I'm talking about this:
>
> > We have patterns to fold vector arithmetic with a splat operand into special instructions too. Those patterns expect G_VMV_V_X_VL/G_VFMV_V_F_VL
>
> What I meant is that, I think we should prefer matching generic opcodes like SPLAT_VECTOR in the arithmetic patterns (like you suggested) rather than matching the generic target-specifc opcodes. sorry for not phrasing this clearly.
I think there will still be cases where we need to match a target specific opcode that carries the VL operand. Maybe we can use a GISel equivalent of ISD::EXPERIMENTAL_VP_SPLAT these days. We didn't originally have vp.splat intrinsic or target-independent ISD opcode in SelectionDAG.
https://github.com/llvm/llvm-project/pull/111193
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