[llvm] [CodeGen] Use 128bits for LaneBitmask. (PR #111157)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> I'm not really sure what AMDGPU does that is different or how it encodes the information more efficiently. Are there any lane masks in the table I shared above that you believe use unnecessary regunits?

This table seems to have one bit for every subregister index. I would expect overlapping tuples to use multiple bits of mask. e.g. AMDGPU has this:

```
hi16 :   L0000000000000001 EMPTY
lo16 :   L0000000000000002 EMPTY
sub0 :   L0000000000000003 EMPTY
sub0_sub1 :   L000000000000000F EMPTY
sub0_sub1_sub2 :   L000000000000003F EMPTY
...

```

https://github.com/llvm/llvm-project/pull/111157