[llvm] [CodeGen] Use 128bits for LaneBitmask. (PR #111157)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 4 07:02:52 PDT 2024


arsenm wrote:

I still don't understand why AArch64 needs so many bits. Having sub registers that alias does not mean you need additional register units. You should only need one for each physically distinct bits, despite differences in access 

https://github.com/llvm/llvm-project/pull/111157


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