[llvm] [AArch64] Improve index selection for histograms (PR #111150)
Benjamin Maxwell via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 4 06:42:01 PDT 2024
================
@@ -24079,12 +24079,42 @@ static bool findMoreOptimalIndexType(const MaskedGatherScatterSDNode *N,
static SDValue performMaskedGatherScatterCombine(
SDNode *N, TargetLowering::DAGCombinerInfo &DCI, SelectionDAG &DAG) {
- MaskedGatherScatterSDNode *MGS = cast<MaskedGatherScatterSDNode>(N);
- assert(MGS && "Can only combine gather load or scatter store nodes");
+ MaskedHistogramSDNode *HG;
+ MaskedGatherScatterSDNode *MGS;
+ if (N->getOpcode() == ISD::EXPERIMENTAL_VECTOR_HISTOGRAM) {
+ HG = cast<MaskedHistogramSDNode>(N);
+ } else {
+ MGS = cast<MaskedGatherScatterSDNode>(N);
+ }
+ assert((HG || MGS) &&
+ "Can only combine gather load, scatter store or histogram nodes");
if (!DCI.isBeforeLegalize())
return SDValue();
----------------
MacDue wrote:
Move `if (!DCI.isBeforeLegalize())` check before `HG` / `MGS` check?
https://github.com/llvm/llvm-project/pull/111150
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