[llvm] d68083f - [FuncSpec] Update tests to use --include-generated-funcs (NFC)

Hari Limaye via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 4 06:29:11 PDT 2024


Author: Hari Limaye
Date: 2024-10-04T13:28:06Z
New Revision: d68083feba2ff869dae96e938b1fa64296f84274

URL: https://github.com/llvm/llvm-project/commit/d68083feba2ff869dae96e938b1fa64296f84274
DIFF: https://github.com/llvm/llvm-project/commit/d68083feba2ff869dae96e938b1fa64296f84274.diff

LOG: [FuncSpec] Update tests to use --include-generated-funcs (NFC)

Added: 
    

Modified: 
    llvm/test/Transforms/FunctionSpecialization/function-specialization2.ll
    llvm/test/Transforms/FunctionSpecialization/identical-specializations.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/FunctionSpecialization/function-specialization2.ll b/llvm/test/Transforms/FunctionSpecialization/function-specialization2.ll
index b6cdcf18eea429..ef830a0e9a4a9e 100644
--- a/llvm/test/Transforms/FunctionSpecialization/function-specialization2.ll
+++ b/llvm/test/Transforms/FunctionSpecialization/function-specialization2.ll
@@ -1,10 +1,8 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 5
 ; RUN: opt -passes="ipsccp<func-spec>,deadargelim" -force-specialization -S < %s | FileCheck %s
-; RUN: opt -passes="ipsccp<func-spec>,deadargelim" -funcspec-max-iters=1 -force-specialization -S < %s | FileCheck %s
+; RUN: opt -passes="ipsccp<func-spec>,deadargelim" -funcspec-max-iters=1 -force-specialization -S < %s | FileCheck %s --check-prefix=ONE-ITER
 ; RUN: opt -passes="ipsccp<func-spec>,deadargelim" -funcspec-max-iters=0 -force-specialization -S < %s | FileCheck %s --check-prefix=DISABLED
 
-; DISABLED-NOT: @func.specialized.1(
-; DISABLED-NOT: @func.specialized.2(
 
 define internal i32 @func(ptr %0, i32 %1, ptr nocapture %2) {
   %4 = alloca i32, align 4
@@ -42,47 +40,176 @@ define internal void @decrement(ptr nocapture %0) {
 }
 
 define i32 @main(ptr %0, i32 %1) {
-; CHECK:    call void @func.specialized.2(ptr [[TMP0:%.*]], i32 [[TMP1:%.*]])
   %3 = call i32 @func(ptr %0, i32 %1, ptr nonnull @increment)
-; CHECK:    call void @func.specialized.1(ptr [[TMP0]], i32 0)
   %4 = call i32 @func(ptr %0, i32 %3, ptr nonnull @decrement)
-; CHECK:    ret i32 0
   ret i32 %4
 }
 
-; CHECK: @func.specialized.1(
-; CHECK:    [[TMP3:%.*]] = alloca i32, align 4
-; CHECK:    store i32 [[TMP1:%.*]], ptr [[TMP3]], align 4
-; CHECK:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
-; CHECK:    [[TMP5:%.*]] = icmp slt i32 [[TMP4]], 1
-; CHECK:    br i1 [[TMP5]], label [[TMP13:%.*]], label [[TMP6:%.*]]
-; CHECK:       6:
-; CHECK:    [[TMP7:%.*]] = load i32, ptr [[TMP3]], align 4
-; CHECK:    [[TMP8:%.*]] = sext i32 [[TMP7]] to i64
-; CHECK:    [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP0:%.*]], i64 [[TMP8]]
-; CHECK:    call void @decrement(ptr [[TMP9]])
-; CHECK:    [[TMP10:%.*]] = load i32, ptr [[TMP3]], align 4
-; CHECK:    [[TMP11:%.*]] = add nsw i32 [[TMP10]], -1
-; CHECK:    call void @func.specialized.1(ptr [[TMP0]], i32 [[TMP11]])
-; CHECK:    br label [[TMP12:%.*]]
-; CHECK:       12:
-; CHECK:    ret void
-;
-;
-; CHECK: @func.specialized.2(
-; CHECK:    [[TMP3:%.*]] = alloca i32, align 4
-; CHECK:    store i32 [[TMP1:%.*]], ptr [[TMP3]], align 4
-; CHECK:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
-; CHECK:    [[TMP5:%.*]] = icmp slt i32 [[TMP4]], 1
-; CHECK:    br i1 [[TMP5]], label [[TMP13:%.*]], label [[TMP6:%.*]]
-; CHECK:       6:
-; CHECK:    [[TMP7:%.*]] = load i32, ptr [[TMP3]], align 4
-; CHECK:    [[TMP8:%.*]] = sext i32 [[TMP7]] to i64
-; CHECK:    [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP0:%.*]], i64 [[TMP8]]
-; CHECK:    call void @increment(ptr [[TMP9]])
-; CHECK:    [[TMP10:%.*]] = load i32, ptr [[TMP3]], align 4
-; CHECK:    [[TMP11:%.*]] = add nsw i32 [[TMP10]], -1
-; CHECK:    call void @func.specialized.2(ptr [[TMP0]], i32 [[TMP11]])
-; CHECK:    br label [[TMP12:%.*]]
-; CHECK:       12:
-; CHECK:    ret void
+; CHECK-LABEL: define internal void @increment(
+; CHECK-SAME: ptr nocapture [[TMP0:%.*]]) {
+; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4
+; CHECK-NEXT:    [[TMP3:%.*]] = add nsw i32 [[TMP2]], 1
+; CHECK-NEXT:    store i32 [[TMP3]], ptr [[TMP0]], align 4
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: define internal void @decrement(
+; CHECK-SAME: ptr nocapture [[TMP0:%.*]]) {
+; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4
+; CHECK-NEXT:    [[TMP3:%.*]] = add nsw i32 [[TMP2]], -1
+; CHECK-NEXT:    store i32 [[TMP3]], ptr [[TMP0]], align 4
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: define i32 @main(
+; CHECK-SAME: ptr [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
+; CHECK-NEXT:    call void @func.specialized.2(ptr [[TMP0]], i32 [[TMP1]])
+; CHECK-NEXT:    call void @func.specialized.1(ptr [[TMP0]], i32 0)
+; CHECK-NEXT:    ret i32 0
+;
+;
+; CHECK-LABEL: define internal void @func.specialized.1(
+; CHECK-SAME: ptr [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
+; CHECK-NEXT:    [[TMP2:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    store i32 [[TMP1]], ptr [[TMP2]], align 4
+; CHECK-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp slt i32 [[TMP3]], 1
+; CHECK-NEXT:    br i1 [[TMP4]], label %[[BB12:.*]], label %[[BB6:.*]]
+; CHECK:       [[BB6]]:
+; CHECK-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP2]], align 4
+; CHECK-NEXT:    [[TMP7:%.*]] = sext i32 [[TMP6]] to i64
+; CHECK-NEXT:    [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i64 [[TMP7]]
+; CHECK-NEXT:    call void @decrement(ptr [[TMP8]])
+; CHECK-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP2]], align 4
+; CHECK-NEXT:    [[TMP10:%.*]] = add nsw i32 [[TMP9]], -1
+; CHECK-NEXT:    call void @func.specialized.1(ptr [[TMP0]], i32 [[TMP10]])
+; CHECK-NEXT:    br label %[[BB12]]
+; CHECK:       [[BB12]]:
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: define internal void @func.specialized.2(
+; CHECK-SAME: ptr [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
+; CHECK-NEXT:    [[TMP3:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    store i32 [[TMP1]], ptr [[TMP3]], align 4
+; CHECK-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
+; CHECK-NEXT:    [[TMP5:%.*]] = icmp slt i32 [[TMP4]], 1
+; CHECK-NEXT:    br i1 [[TMP5]], label %[[BB12:.*]], label %[[BB6:.*]]
+; CHECK:       [[BB6]]:
+; CHECK-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP3]], align 4
+; CHECK-NEXT:    [[TMP8:%.*]] = sext i32 [[TMP7]] to i64
+; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i64 [[TMP8]]
+; CHECK-NEXT:    call void @increment(ptr [[TMP9]])
+; CHECK-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP3]], align 4
+; CHECK-NEXT:    [[TMP11:%.*]] = add nsw i32 [[TMP10]], -1
+; CHECK-NEXT:    call void @func.specialized.2(ptr [[TMP0]], i32 [[TMP11]])
+; CHECK-NEXT:    br label %[[BB12]]
+; CHECK:       [[BB12]]:
+; CHECK-NEXT:    ret void
+;
+;
+; ONE-ITER-LABEL: define internal void @increment(
+; ONE-ITER-SAME: ptr nocapture [[TMP0:%.*]]) {
+; ONE-ITER-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4
+; ONE-ITER-NEXT:    [[TMP3:%.*]] = add nsw i32 [[TMP2]], 1
+; ONE-ITER-NEXT:    store i32 [[TMP3]], ptr [[TMP0]], align 4
+; ONE-ITER-NEXT:    ret void
+;
+;
+; ONE-ITER-LABEL: define internal void @decrement(
+; ONE-ITER-SAME: ptr nocapture [[TMP0:%.*]]) {
+; ONE-ITER-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4
+; ONE-ITER-NEXT:    [[TMP3:%.*]] = add nsw i32 [[TMP2]], -1
+; ONE-ITER-NEXT:    store i32 [[TMP3]], ptr [[TMP0]], align 4
+; ONE-ITER-NEXT:    ret void
+;
+;
+; ONE-ITER-LABEL: define i32 @main(
+; ONE-ITER-SAME: ptr [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
+; ONE-ITER-NEXT:    call void @func.specialized.2(ptr [[TMP0]], i32 [[TMP1]])
+; ONE-ITER-NEXT:    call void @func.specialized.1(ptr [[TMP0]], i32 0)
+; ONE-ITER-NEXT:    ret i32 0
+;
+;
+; ONE-ITER-LABEL: define internal void @func.specialized.1(
+; ONE-ITER-SAME: ptr [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
+; ONE-ITER-NEXT:    [[TMP2:%.*]] = alloca i32, align 4
+; ONE-ITER-NEXT:    store i32 [[TMP1]], ptr [[TMP2]], align 4
+; ONE-ITER-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
+; ONE-ITER-NEXT:    [[TMP4:%.*]] = icmp slt i32 [[TMP3]], 1
+; ONE-ITER-NEXT:    br i1 [[TMP4]], label %[[BB12:.*]], label %[[BB6:.*]]
+; ONE-ITER:       [[BB6]]:
+; ONE-ITER-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP2]], align 4
+; ONE-ITER-NEXT:    [[TMP7:%.*]] = sext i32 [[TMP6]] to i64
+; ONE-ITER-NEXT:    [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i64 [[TMP7]]
+; ONE-ITER-NEXT:    call void @decrement(ptr [[TMP8]])
+; ONE-ITER-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP2]], align 4
+; ONE-ITER-NEXT:    [[TMP10:%.*]] = add nsw i32 [[TMP9]], -1
+; ONE-ITER-NEXT:    call void @func.specialized.1(ptr [[TMP0]], i32 [[TMP10]])
+; ONE-ITER-NEXT:    br label %[[BB12]]
+; ONE-ITER:       [[BB12]]:
+; ONE-ITER-NEXT:    ret void
+;
+;
+; ONE-ITER-LABEL: define internal void @func.specialized.2(
+; ONE-ITER-SAME: ptr [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
+; ONE-ITER-NEXT:    [[TMP3:%.*]] = alloca i32, align 4
+; ONE-ITER-NEXT:    store i32 [[TMP1]], ptr [[TMP3]], align 4
+; ONE-ITER-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
+; ONE-ITER-NEXT:    [[TMP5:%.*]] = icmp slt i32 [[TMP4]], 1
+; ONE-ITER-NEXT:    br i1 [[TMP5]], label %[[BB12:.*]], label %[[BB6:.*]]
+; ONE-ITER:       [[BB6]]:
+; ONE-ITER-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP3]], align 4
+; ONE-ITER-NEXT:    [[TMP8:%.*]] = sext i32 [[TMP7]] to i64
+; ONE-ITER-NEXT:    [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i64 [[TMP8]]
+; ONE-ITER-NEXT:    call void @increment(ptr [[TMP9]])
+; ONE-ITER-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP3]], align 4
+; ONE-ITER-NEXT:    [[TMP11:%.*]] = add nsw i32 [[TMP10]], -1
+; ONE-ITER-NEXT:    call void @func.specialized.2(ptr [[TMP0]], i32 [[TMP11]])
+; ONE-ITER-NEXT:    br label %[[BB12]]
+; ONE-ITER:       [[BB12]]:
+; ONE-ITER-NEXT:    ret void
+;
+;
+; DISABLED-LABEL: define internal void @func(
+; DISABLED-SAME: ptr [[TMP0:%.*]], i32 [[TMP1:%.*]], ptr nocapture [[TMP2:%.*]]) {
+; DISABLED-NEXT:    [[TMP4:%.*]] = alloca i32, align 4
+; DISABLED-NEXT:    store i32 [[TMP1]], ptr [[TMP4]], align 4
+; DISABLED-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
+; DISABLED-NEXT:    [[TMP6:%.*]] = icmp slt i32 [[TMP5]], 1
+; DISABLED-NEXT:    br i1 [[TMP6]], label %[[BB13:.*]], label %[[BB7:.*]]
+; DISABLED:       [[BB7]]:
+; DISABLED-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP4]], align 4
+; DISABLED-NEXT:    [[TMP9:%.*]] = sext i32 [[TMP8]] to i64
+; DISABLED-NEXT:    [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i64 [[TMP9]]
+; DISABLED-NEXT:    call void [[TMP2]](ptr [[TMP10]])
+; DISABLED-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP4]], align 4
+; DISABLED-NEXT:    [[TMP12:%.*]] = add nsw i32 [[TMP11]], -1
+; DISABLED-NEXT:    call void @func(ptr [[TMP0]], i32 [[TMP12]], ptr [[TMP2]])
+; DISABLED-NEXT:    br label %[[BB13]]
+; DISABLED:       [[BB13]]:
+; DISABLED-NEXT:    ret void
+;
+;
+; DISABLED-LABEL: define internal void @increment(
+; DISABLED-SAME: ptr nocapture [[TMP0:%.*]]) {
+; DISABLED-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4
+; DISABLED-NEXT:    [[TMP3:%.*]] = add nsw i32 [[TMP2]], 1
+; DISABLED-NEXT:    store i32 [[TMP3]], ptr [[TMP0]], align 4
+; DISABLED-NEXT:    ret void
+;
+;
+; DISABLED-LABEL: define internal void @decrement(
+; DISABLED-SAME: ptr nocapture [[TMP0:%.*]]) {
+; DISABLED-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4
+; DISABLED-NEXT:    [[TMP3:%.*]] = add nsw i32 [[TMP2]], -1
+; DISABLED-NEXT:    store i32 [[TMP3]], ptr [[TMP0]], align 4
+; DISABLED-NEXT:    ret void
+;
+;
+; DISABLED-LABEL: define i32 @main(
+; DISABLED-SAME: ptr [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
+; DISABLED-NEXT:    call void @func(ptr [[TMP0]], i32 [[TMP1]], ptr nonnull @increment)
+; DISABLED-NEXT:    call void @func(ptr [[TMP0]], i32 0, ptr nonnull @decrement)
+; DISABLED-NEXT:    ret i32 0
+;

diff  --git a/llvm/test/Transforms/FunctionSpecialization/identical-specializations.ll b/llvm/test/Transforms/FunctionSpecialization/identical-specializations.ll
index 368f3b04403447..930ed6627f7f1e 100644
--- a/llvm/test/Transforms/FunctionSpecialization/identical-specializations.ll
+++ b/llvm/test/Transforms/FunctionSpecialization/identical-specializations.ll
@@ -1,21 +1,7 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 5
 ; RUN: opt -passes="ipsccp<func-spec>" -force-specialization -S < %s | FileCheck %s
 
 define i64 @main(i64 %x, i64 %y, i1 %flag) {
-; CHECK-LABEL: @main(
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    br i1 [[FLAG:%.*]], label [[PLUS:%.*]], label [[MINUS:%.*]]
-; CHECK:       plus:
-; CHECK-NEXT:    [[CMP0:%.*]] = call i64 @compute.specialized.2(i64 [[X:%.*]], i64 [[Y:%.*]], ptr @plus, ptr @minus)
-; CHECK-NEXT:    br label [[MERGE:%.*]]
-; CHECK:       minus:
-; CHECK-NEXT:    [[CMP1:%.*]] = call i64 @compute.specialized.3(i64 [[X]], i64 [[Y]], ptr @minus, ptr @plus)
-; CHECK-NEXT:    br label [[MERGE]]
-; CHECK:       merge:
-; CHECK-NEXT:    [[PH:%.*]] = phi i64 [ [[CMP0]], [[PLUS]] ], [ [[CMP1]], [[MINUS]] ]
-; CHECK-NEXT:    [[CMP2:%.*]] = call i64 @compute.specialized.2(i64 [[PH]], i64 42, ptr @plus, ptr @minus)
-; CHECK-NEXT:    ret i64 [[CMP2]]
-;
 entry:
   br i1 %flag, label %plus, label %minus
 
@@ -47,33 +33,87 @@ entry:
 }
 
 define internal i64 @plus(i64 %x, i64 %y) {
-; CHECK-LABEL: @plus(
 entry:
   %add = add i64 %x, %y
   ret i64 %add
 }
 
 define internal i64 @minus(i64 %x, i64 %y) {
-; CHECK-LABEL: @minus(
 entry:
   %sub = sub i64 %x, %y
   ret i64 %sub
 }
 
-; CHECK-LABEL: @compute.specialized.1
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[CMP0:%.*]] = call i64 %binop1(i64 [[X:%.*]], i64 [[Y:%.*]])
-; CHECK-NEXT:    [[CMP1:%.*]] = call i64 @plus(i64 [[X]], i64 [[Y]])
-; CHECK-NEXT:    [[CMP2:%.*]] = call i64 @compute.specialized.1(i64 [[X]], i64 [[Y]], ptr %binop1, ptr @plus)
 
-; CHECK-LABEL: @compute.specialized.2
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[CMP0:%.*]] = call i64 @plus(i64 [[X:%.*]], i64 [[Y:%.*]])
-; CHECK-NEXT:    [[CMP1:%.*]] = call i64 @minus(i64 [[X]], i64 [[Y]])
-; CHECK-NEXT:    [[CMP2:%.*]] = call i64 @compute.specialized.1(i64 [[X]], i64 [[Y]], ptr @plus, ptr @plus)
 
-; CHECK-LABEL: @compute.specialized.3
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[CMP0:%.*]] = call i64 @minus(i64 [[X:%.*]], i64 [[Y:%.*]])
-; CHECK-NEXT:    [[CMP1:%.*]] = call i64 @plus(i64 [[X]], i64 [[Y]])
-; CHECK-NEXT:    [[CMP2:%.*]] = call i64 @compute.specialized.3(i64 [[X]], i64 [[Y]], ptr @minus, ptr @plus)
+; CHECK-LABEL: define i64 @main(
+; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]], i1 [[FLAG:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    br i1 [[FLAG]], label %[[PLUS:.*]], label %[[MINUS:.*]]
+; CHECK:       [[PLUS]]:
+; CHECK-NEXT:    [[CMP0:%.*]] = call i64 @compute.specialized.2(i64 [[X]], i64 [[Y]], ptr @plus, ptr @minus)
+; CHECK-NEXT:    br label %[[MERGE:.*]]
+; CHECK:       [[MINUS]]:
+; CHECK-NEXT:    [[CMP1:%.*]] = call i64 @compute.specialized.3(i64 [[X]], i64 [[Y]], ptr @minus, ptr @plus)
+; CHECK-NEXT:    br label %[[MERGE]]
+; CHECK:       [[MERGE]]:
+; CHECK-NEXT:    [[PH:%.*]] = phi i64 [ [[CMP0]], %[[PLUS]] ], [ [[CMP1]], %[[MINUS]] ]
+; CHECK-NEXT:    [[CMP2:%.*]] = call i64 @compute.specialized.2(i64 [[PH]], i64 42, ptr @plus, ptr @minus)
+; CHECK-NEXT:    ret i64 [[CMP2]]
+;
+;
+; CHECK-LABEL: define internal i64 @plus(
+; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[ADD:%.*]] = add i64 [[X]], [[Y]]
+; CHECK-NEXT:    ret i64 [[ADD]]
+;
+;
+; CHECK-LABEL: define internal i64 @minus(
+; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[SUB:%.*]] = sub i64 [[X]], [[Y]]
+; CHECK-NEXT:    ret i64 [[SUB]]
+;
+;
+; CHECK-LABEL: define internal i64 @compute.specialized.1(
+; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]], ptr [[BINOP1:%.*]], ptr [[BINOP2:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[OP1:%.*]] = call i64 [[BINOP1]](i64 [[X]], i64 [[Y]])
+; CHECK-NEXT:    [[OP0:%.*]] = call i64 @plus(i64 [[X]], i64 [[Y]])
+; CHECK-NEXT:    [[OP2:%.*]] = call i64 @compute.specialized.1(i64 [[X]], i64 [[Y]], ptr [[BINOP1]], ptr @plus)
+; CHECK-NEXT:    [[ADD0:%.*]] = add i64 [[OP1]], [[OP0]]
+; CHECK-NEXT:    [[ADD1:%.*]] = add i64 [[ADD0]], [[OP2]]
+; CHECK-NEXT:    [[DIV:%.*]] = sdiv i64 [[ADD1]], [[X]]
+; CHECK-NEXT:    [[SUB:%.*]] = sub i64 [[DIV]], [[Y]]
+; CHECK-NEXT:    [[MUL:%.*]] = mul i64 [[SUB]], 2
+; CHECK-NEXT:    ret i64 [[MUL]]
+;
+;
+; CHECK-LABEL: define internal i64 @compute.specialized.2(
+; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]], ptr [[BINOP1:%.*]], ptr [[BINOP2:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[OP0:%.*]] = call i64 @plus(i64 [[X]], i64 [[Y]])
+; CHECK-NEXT:    [[OP1:%.*]] = call i64 @minus(i64 [[X]], i64 [[Y]])
+; CHECK-NEXT:    [[OP2:%.*]] = call i64 @compute.specialized.1(i64 [[X]], i64 [[Y]], ptr @plus, ptr @plus)
+; CHECK-NEXT:    [[ADD0:%.*]] = add i64 [[OP0]], [[OP1]]
+; CHECK-NEXT:    [[ADD1:%.*]] = add i64 [[ADD0]], [[OP2]]
+; CHECK-NEXT:    [[DIV:%.*]] = sdiv i64 [[ADD1]], [[X]]
+; CHECK-NEXT:    [[SUB:%.*]] = sub i64 [[DIV]], [[Y]]
+; CHECK-NEXT:    [[MUL:%.*]] = mul i64 [[SUB]], 2
+; CHECK-NEXT:    ret i64 [[MUL]]
+;
+;
+; CHECK-LABEL: define internal i64 @compute.specialized.3(
+; CHECK-SAME: i64 [[X:%.*]], i64 [[Y:%.*]], ptr [[BINOP1:%.*]], ptr [[BINOP2:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[OP0:%.*]] = call i64 @minus(i64 [[X]], i64 [[Y]])
+; CHECK-NEXT:    [[OP1:%.*]] = call i64 @plus(i64 [[X]], i64 [[Y]])
+; CHECK-NEXT:    [[OP2:%.*]] = call i64 @compute.specialized.3(i64 [[X]], i64 [[Y]], ptr @minus, ptr @plus)
+; CHECK-NEXT:    [[ADD0:%.*]] = add i64 [[OP0]], [[OP1]]
+; CHECK-NEXT:    [[ADD1:%.*]] = add i64 [[ADD0]], [[OP2]]
+; CHECK-NEXT:    [[DIV:%.*]] = sdiv i64 [[ADD1]], [[X]]
+; CHECK-NEXT:    [[SUB:%.*]] = sub i64 [[DIV]], [[Y]]
+; CHECK-NEXT:    [[MUL:%.*]] = mul i64 [[SUB]], 2
+; CHECK-NEXT:    ret i64 [[MUL]]
+;


        


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