[llvm] [SLP]Add subvector vectorization for non-load nodes (PR #108430)

[Arthur Eubanks via llvm-commits]

aeubanks wrote:

> > I tried minimizing some more by outlining code and am seeing SLPVectorizer trunc i64 to i8 then zext to i32 when the original code only truncs from i64 to i32, is that something that should happen?
> 
> Yes, minbitwidth analysis to reduce the size of the data/reg usage.
> 
> The problem must be fixed in [c1b911c](https://github.com/llvm/llvm-project/commit/c1b911c5798654b9b77746901919b86b3f1fe94c)

thanks, that fixes the miscompiled test we were seeing

https://github.com/llvm/llvm-project/pull/108430