[llvm] [AArch64][GlobalISel] Combine G_EXTRACT_VECTOR_ELT and G_BUILD_VECTOR sequences into G_SHUFFLE_VECTOR (PR #110545)

Amara Emerson via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 2 10:06:37 PDT 2024


================
@@ -905,6 +905,16 @@ def extract_vec_elt_build_vec : GICombineRule<
     [{ return Helper.matchExtractVecEltBuildVec(*${root}, ${matchinfo}); }]),
   (apply [{ Helper.applyExtractVecEltBuildVec(*${root}, ${matchinfo}); }])>;
 
+def extract_vector_register_to_id_mapping_matchinfo :
+  GIDefMatchData<"SmallVector<std::pair<Register, int>>">;
+def vector_reg_pair_matchinfo :
+  GIDefMatchData<"std::pair<Register, Register>">;
+def extract_vector_element_build_vector_to_shuffle_vector : GICombineRule<
+  (defs root:$root, extract_vector_register_to_id_mapping_matchinfo:$matchinfo, vector_reg_pair_matchinfo:$regpair),
+  (match (wip_match_opcode G_BUILD_VECTOR):$root,
----------------
aemerson wrote:

> Thanks for the review, sorry for committing something that you really don't like. I hope that are things about it you do enjoy. I really appreciate the link. I missed it when I looked for something like it before and I am happy with any information about tablegen that I can find.

Please don't be discouraged, Thorsten was only referring to the approach itself and it's common and expected in LLVM code reviews to critique the code in that manner. It's not a reflection on whether we want your contribution at all, usually it's just a matter of making sure it's done in the best way possible. We'd love to have more people like yourself contribute to the project!

I haven't thought about this patch in detail yet but once I do I'll give my feedback.



https://github.com/llvm/llvm-project/pull/110545


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