[llvm] [RISCV][GISEL] Legalize G_INSERT_SUBVECTOR (PR #108859)
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 2 08:18:31 PDT 2024
================
@@ -1054,6 +1058,142 @@ bool RISCVLegalizerInfo::legalizeExtractSubvector(MachineInstr &MI,
return true;
}
+bool RISCVLegalizerInfo::legalizeInsertSubvector(MachineInstr &MI,
+ LegalizerHelper &Helper,
+ MachineIRBuilder &MIB) const {
+ GInsertSubvector &IS = cast<GInsertSubvector>(MI);
+
+ MachineRegisterInfo &MRI = *MIB.getMRI();
+
+ Register Dst = IS.getReg(0);
+ Register BigVec = IS.getBigVec();
+ Register LitVec = IS.getSubVec();
+ uint64_t Idx = IS.getIndexImm();
+
+ LLT BigTy = MRI.getType(BigVec);
+ LLT LitTy = MRI.getType(LitVec);
+
+ if (Idx == 0 ||
+ MRI.getVRegDef(BigVec)->getOpcode() == TargetOpcode::G_IMPLICIT_DEF)
+ return true;
+
+ // We don't have the ability to slide mask vectors up indexed by their i1
+ // elements; the smallest we can do is i8. Often we are able to bitcast to
+ // equivalent i8 vectors. Otherwise, we can must zeroextend to equivalent i8
+ // vectors and truncate down after the insert.
+ if (LitTy.getElementType() == LLT::scalar(1)) {
+ auto BigTyMinElts = BigTy.getElementCount().getKnownMinValue();
+ auto LitTyMinElts = LitTy.getElementCount().getKnownMinValue();
+ if (BigTyMinElts >= 8 && LitTyMinElts >= 8)
----------------
michaelmaitland wrote:
Maybe we can do the under check in a combine, but I still don’t think it’s possible to check that the index is not zero is it?
https://github.com/llvm/llvm-project/pull/108859
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