[llvm] 496187b - [RISCV] Move bfloat tests back above half. NFC
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 2 00:31:07 PDT 2024
Author: Luke Lau
Date: 2024-10-02T15:30:49+08:00
New Revision: 496187b3b81ea76a8b67d796609d7f09992cf96d
URL: https://github.com/llvm/llvm-project/commit/496187b3b81ea76a8b67d796609d7f09992cf96d
DIFF: https://github.com/llvm/llvm-project/commit/496187b3b81ea76a8b67d796609d7f09992cf96d.diff
LOG: [RISCV] Move bfloat tests back above half. NFC
In the other tests bfloats tend to come before the halfs, in
insertelt-fp.ll they were temporarily swapped to help with the diff in
Added:
Modified:
llvm/test/CodeGen/RISCV/rvv/insertelt-fp.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/rvv/insertelt-fp.ll b/llvm/test/CodeGen/RISCV/rvv/insertelt-fp.ll
index 9b7a2600bcf0b0..607e0085c3f468 100644
--- a/llvm/test/CodeGen/RISCV/rvv/insertelt-fp.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/insertelt-fp.ll
@@ -8,6 +8,228 @@
; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zfbfmin,+zvfhmin,+zvfbfmin,+v -target-abi=lp64d \
; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
+define <vscale x 1 x bfloat> @insertelt_nxv1bf16_0(<vscale x 1 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv1bf16_0:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
+; CHECK-NEXT: vmv.s.x v8, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 1 x bfloat> %v, bfloat %elt, i32 0
+ ret <vscale x 1 x bfloat> %r
+}
+
+define <vscale x 1 x bfloat> @insertelt_nxv1bf16_imm(<vscale x 1 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv1bf16_imm:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetivli zero, 4, e16, mf4, tu, ma
+; CHECK-NEXT: vmv.s.x v9, a0
+; CHECK-NEXT: vslideup.vi v8, v9, 3
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 1 x bfloat> %v, bfloat %elt, i32 3
+ ret <vscale x 1 x bfloat> %r
+}
+
+define <vscale x 1 x bfloat> @insertelt_nxv1bf16_idx(<vscale x 1 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
+; CHECK-LABEL: insertelt_nxv1bf16_idx:
+; CHECK: # %bb.0:
+; CHECK-NEXT: addi a1, a0, 1
+; CHECK-NEXT: fmv.x.h a2, fa0
+; CHECK-NEXT: vsetvli a3, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmv.s.x v9, a2
+; CHECK-NEXT: vsetvli zero, a1, e16, mf4, tu, ma
+; CHECK-NEXT: vslideup.vx v8, v9, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 1 x bfloat> %v, bfloat %elt, i32 %idx
+ ret <vscale x 1 x bfloat> %r
+}
+
+define <vscale x 2 x bfloat> @insertelt_nxv2bf16_0(<vscale x 2 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv2bf16_0:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
+; CHECK-NEXT: vmv.s.x v8, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 2 x bfloat> %v, bfloat %elt, i32 0
+ ret <vscale x 2 x bfloat> %r
+}
+
+define <vscale x 2 x bfloat> @insertelt_nxv2bf16_imm(<vscale x 2 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv2bf16_imm:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetivli zero, 4, e16, mf2, tu, ma
+; CHECK-NEXT: vmv.s.x v9, a0
+; CHECK-NEXT: vslideup.vi v8, v9, 3
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 2 x bfloat> %v, bfloat %elt, i32 3
+ ret <vscale x 2 x bfloat> %r
+}
+
+define <vscale x 2 x bfloat> @insertelt_nxv2bf16_idx(<vscale x 2 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
+; CHECK-LABEL: insertelt_nxv2bf16_idx:
+; CHECK: # %bb.0:
+; CHECK-NEXT: addi a1, a0, 1
+; CHECK-NEXT: fmv.x.h a2, fa0
+; CHECK-NEXT: vsetvli a3, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmv.s.x v9, a2
+; CHECK-NEXT: vsetvli zero, a1, e16, mf2, tu, ma
+; CHECK-NEXT: vslideup.vx v8, v9, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 2 x bfloat> %v, bfloat %elt, i32 %idx
+ ret <vscale x 2 x bfloat> %r
+}
+
+define <vscale x 4 x bfloat> @insertelt_nxv4bf16_0(<vscale x 4 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv4bf16_0:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
+; CHECK-NEXT: vmv.s.x v8, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 4 x bfloat> %v, bfloat %elt, i32 0
+ ret <vscale x 4 x bfloat> %r
+}
+
+define <vscale x 4 x bfloat> @insertelt_nxv4bf16_imm(<vscale x 4 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv4bf16_imm:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetivli zero, 4, e16, m1, tu, ma
+; CHECK-NEXT: vmv.s.x v9, a0
+; CHECK-NEXT: vslideup.vi v8, v9, 3
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 4 x bfloat> %v, bfloat %elt, i32 3
+ ret <vscale x 4 x bfloat> %r
+}
+
+define <vscale x 4 x bfloat> @insertelt_nxv4bf16_idx(<vscale x 4 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
+; CHECK-LABEL: insertelt_nxv4bf16_idx:
+; CHECK: # %bb.0:
+; CHECK-NEXT: addi a1, a0, 1
+; CHECK-NEXT: fmv.x.h a2, fa0
+; CHECK-NEXT: vsetvli a3, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmv.s.x v9, a2
+; CHECK-NEXT: vsetvli zero, a1, e16, m1, tu, ma
+; CHECK-NEXT: vslideup.vx v8, v9, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 4 x bfloat> %v, bfloat %elt, i32 %idx
+ ret <vscale x 4 x bfloat> %r
+}
+
+define <vscale x 8 x bfloat> @insertelt_nxv8bf16_0(<vscale x 8 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv8bf16_0:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
+; CHECK-NEXT: vmv.s.x v8, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 8 x bfloat> %v, bfloat %elt, i32 0
+ ret <vscale x 8 x bfloat> %r
+}
+
+define <vscale x 8 x bfloat> @insertelt_nxv8bf16_imm(<vscale x 8 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv8bf16_imm:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetivli zero, 4, e16, m1, tu, ma
+; CHECK-NEXT: vmv.s.x v10, a0
+; CHECK-NEXT: vslideup.vi v8, v10, 3
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 8 x bfloat> %v, bfloat %elt, i32 3
+ ret <vscale x 8 x bfloat> %r
+}
+
+define <vscale x 8 x bfloat> @insertelt_nxv8bf16_idx(<vscale x 8 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
+; CHECK-LABEL: insertelt_nxv8bf16_idx:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a1, fa0
+; CHECK-NEXT: vsetvli a2, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmv.s.x v10, a1
+; CHECK-NEXT: addi a1, a0, 1
+; CHECK-NEXT: vsetvli zero, a1, e16, m2, tu, ma
+; CHECK-NEXT: vslideup.vx v8, v10, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 8 x bfloat> %v, bfloat %elt, i32 %idx
+ ret <vscale x 8 x bfloat> %r
+}
+
+define <vscale x 16 x bfloat> @insertelt_nxv16bf16_0(<vscale x 16 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv16bf16_0:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
+; CHECK-NEXT: vmv.s.x v8, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 16 x bfloat> %v, bfloat %elt, i32 0
+ ret <vscale x 16 x bfloat> %r
+}
+
+define <vscale x 16 x bfloat> @insertelt_nxv16bf16_imm(<vscale x 16 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv16bf16_imm:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetivli zero, 4, e16, m1, tu, ma
+; CHECK-NEXT: vmv.s.x v12, a0
+; CHECK-NEXT: vslideup.vi v8, v12, 3
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 16 x bfloat> %v, bfloat %elt, i32 3
+ ret <vscale x 16 x bfloat> %r
+}
+
+define <vscale x 16 x bfloat> @insertelt_nxv16bf16_idx(<vscale x 16 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
+; CHECK-LABEL: insertelt_nxv16bf16_idx:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a1, fa0
+; CHECK-NEXT: vsetvli a2, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmv.s.x v12, a1
+; CHECK-NEXT: addi a1, a0, 1
+; CHECK-NEXT: vsetvli zero, a1, e16, m4, tu, ma
+; CHECK-NEXT: vslideup.vx v8, v12, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 16 x bfloat> %v, bfloat %elt, i32 %idx
+ ret <vscale x 16 x bfloat> %r
+}
+
+define <vscale x 32 x bfloat> @insertelt_nxv32bf16_0(<vscale x 32 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv32bf16_0:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
+; CHECK-NEXT: vmv.s.x v8, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 32 x bfloat> %v, bfloat %elt, i32 0
+ ret <vscale x 32 x bfloat> %r
+}
+
+define <vscale x 32 x bfloat> @insertelt_nxv32bf16_imm(<vscale x 32 x bfloat> %v, bfloat %elt) {
+; CHECK-LABEL: insertelt_nxv32bf16_imm:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a0, fa0
+; CHECK-NEXT: vsetivli zero, 4, e16, m1, tu, ma
+; CHECK-NEXT: vmv.s.x v16, a0
+; CHECK-NEXT: vslideup.vi v8, v16, 3
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 32 x bfloat> %v, bfloat %elt, i32 3
+ ret <vscale x 32 x bfloat> %r
+}
+
+define <vscale x 32 x bfloat> @insertelt_nxv32bf16_idx(<vscale x 32 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
+; CHECK-LABEL: insertelt_nxv32bf16_idx:
+; CHECK: # %bb.0:
+; CHECK-NEXT: fmv.x.h a1, fa0
+; CHECK-NEXT: vsetvli a2, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmv.s.x v16, a1
+; CHECK-NEXT: addi a1, a0, 1
+; CHECK-NEXT: vsetvli zero, a1, e16, m8, tu, ma
+; CHECK-NEXT: vslideup.vx v8, v16, a0
+; CHECK-NEXT: ret
+ %r = insertelement <vscale x 32 x bfloat> %v, bfloat %elt, i32 %idx
+ ret <vscale x 32 x bfloat> %r
+}
+
define <vscale x 1 x half> @insertelt_nxv1f16_0(<vscale x 1 x half> %v, half %elt) {
; ZVFH-LABEL: insertelt_nxv1f16_0:
; ZVFH: # %bb.0:
@@ -362,228 +584,6 @@ define <vscale x 32 x half> @insertelt_nxv32f16_idx(<vscale x 32 x half> %v, hal
ret <vscale x 32 x half> %r
}
-define <vscale x 1 x bfloat> @insertelt_nxv1bf16_0(<vscale x 1 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv1bf16_0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
-; CHECK-NEXT: vmv.s.x v8, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 1 x bfloat> %v, bfloat %elt, i32 0
- ret <vscale x 1 x bfloat> %r
-}
-
-define <vscale x 1 x bfloat> @insertelt_nxv1bf16_imm(<vscale x 1 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv1bf16_imm:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetivli zero, 4, e16, mf4, tu, ma
-; CHECK-NEXT: vmv.s.x v9, a0
-; CHECK-NEXT: vslideup.vi v8, v9, 3
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 1 x bfloat> %v, bfloat %elt, i32 3
- ret <vscale x 1 x bfloat> %r
-}
-
-define <vscale x 1 x bfloat> @insertelt_nxv1bf16_idx(<vscale x 1 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
-; CHECK-LABEL: insertelt_nxv1bf16_idx:
-; CHECK: # %bb.0:
-; CHECK-NEXT: addi a1, a0, 1
-; CHECK-NEXT: fmv.x.h a2, fa0
-; CHECK-NEXT: vsetvli a3, zero, e16, m1, ta, ma
-; CHECK-NEXT: vmv.s.x v9, a2
-; CHECK-NEXT: vsetvli zero, a1, e16, mf4, tu, ma
-; CHECK-NEXT: vslideup.vx v8, v9, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 1 x bfloat> %v, bfloat %elt, i32 %idx
- ret <vscale x 1 x bfloat> %r
-}
-
-define <vscale x 2 x bfloat> @insertelt_nxv2bf16_0(<vscale x 2 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv2bf16_0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
-; CHECK-NEXT: vmv.s.x v8, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 2 x bfloat> %v, bfloat %elt, i32 0
- ret <vscale x 2 x bfloat> %r
-}
-
-define <vscale x 2 x bfloat> @insertelt_nxv2bf16_imm(<vscale x 2 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv2bf16_imm:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetivli zero, 4, e16, mf2, tu, ma
-; CHECK-NEXT: vmv.s.x v9, a0
-; CHECK-NEXT: vslideup.vi v8, v9, 3
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 2 x bfloat> %v, bfloat %elt, i32 3
- ret <vscale x 2 x bfloat> %r
-}
-
-define <vscale x 2 x bfloat> @insertelt_nxv2bf16_idx(<vscale x 2 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
-; CHECK-LABEL: insertelt_nxv2bf16_idx:
-; CHECK: # %bb.0:
-; CHECK-NEXT: addi a1, a0, 1
-; CHECK-NEXT: fmv.x.h a2, fa0
-; CHECK-NEXT: vsetvli a3, zero, e16, m1, ta, ma
-; CHECK-NEXT: vmv.s.x v9, a2
-; CHECK-NEXT: vsetvli zero, a1, e16, mf2, tu, ma
-; CHECK-NEXT: vslideup.vx v8, v9, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 2 x bfloat> %v, bfloat %elt, i32 %idx
- ret <vscale x 2 x bfloat> %r
-}
-
-define <vscale x 4 x bfloat> @insertelt_nxv4bf16_0(<vscale x 4 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv4bf16_0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
-; CHECK-NEXT: vmv.s.x v8, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 4 x bfloat> %v, bfloat %elt, i32 0
- ret <vscale x 4 x bfloat> %r
-}
-
-define <vscale x 4 x bfloat> @insertelt_nxv4bf16_imm(<vscale x 4 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv4bf16_imm:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetivli zero, 4, e16, m1, tu, ma
-; CHECK-NEXT: vmv.s.x v9, a0
-; CHECK-NEXT: vslideup.vi v8, v9, 3
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 4 x bfloat> %v, bfloat %elt, i32 3
- ret <vscale x 4 x bfloat> %r
-}
-
-define <vscale x 4 x bfloat> @insertelt_nxv4bf16_idx(<vscale x 4 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
-; CHECK-LABEL: insertelt_nxv4bf16_idx:
-; CHECK: # %bb.0:
-; CHECK-NEXT: addi a1, a0, 1
-; CHECK-NEXT: fmv.x.h a2, fa0
-; CHECK-NEXT: vsetvli a3, zero, e16, m1, ta, ma
-; CHECK-NEXT: vmv.s.x v9, a2
-; CHECK-NEXT: vsetvli zero, a1, e16, m1, tu, ma
-; CHECK-NEXT: vslideup.vx v8, v9, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 4 x bfloat> %v, bfloat %elt, i32 %idx
- ret <vscale x 4 x bfloat> %r
-}
-
-define <vscale x 8 x bfloat> @insertelt_nxv8bf16_0(<vscale x 8 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv8bf16_0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
-; CHECK-NEXT: vmv.s.x v8, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 8 x bfloat> %v, bfloat %elt, i32 0
- ret <vscale x 8 x bfloat> %r
-}
-
-define <vscale x 8 x bfloat> @insertelt_nxv8bf16_imm(<vscale x 8 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv8bf16_imm:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetivli zero, 4, e16, m1, tu, ma
-; CHECK-NEXT: vmv.s.x v10, a0
-; CHECK-NEXT: vslideup.vi v8, v10, 3
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 8 x bfloat> %v, bfloat %elt, i32 3
- ret <vscale x 8 x bfloat> %r
-}
-
-define <vscale x 8 x bfloat> @insertelt_nxv8bf16_idx(<vscale x 8 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
-; CHECK-LABEL: insertelt_nxv8bf16_idx:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a1, fa0
-; CHECK-NEXT: vsetvli a2, zero, e16, m1, ta, ma
-; CHECK-NEXT: vmv.s.x v10, a1
-; CHECK-NEXT: addi a1, a0, 1
-; CHECK-NEXT: vsetvli zero, a1, e16, m2, tu, ma
-; CHECK-NEXT: vslideup.vx v8, v10, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 8 x bfloat> %v, bfloat %elt, i32 %idx
- ret <vscale x 8 x bfloat> %r
-}
-
-define <vscale x 16 x bfloat> @insertelt_nxv16bf16_0(<vscale x 16 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv16bf16_0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
-; CHECK-NEXT: vmv.s.x v8, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 16 x bfloat> %v, bfloat %elt, i32 0
- ret <vscale x 16 x bfloat> %r
-}
-
-define <vscale x 16 x bfloat> @insertelt_nxv16bf16_imm(<vscale x 16 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv16bf16_imm:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetivli zero, 4, e16, m1, tu, ma
-; CHECK-NEXT: vmv.s.x v12, a0
-; CHECK-NEXT: vslideup.vi v8, v12, 3
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 16 x bfloat> %v, bfloat %elt, i32 3
- ret <vscale x 16 x bfloat> %r
-}
-
-define <vscale x 16 x bfloat> @insertelt_nxv16bf16_idx(<vscale x 16 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
-; CHECK-LABEL: insertelt_nxv16bf16_idx:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a1, fa0
-; CHECK-NEXT: vsetvli a2, zero, e16, m1, ta, ma
-; CHECK-NEXT: vmv.s.x v12, a1
-; CHECK-NEXT: addi a1, a0, 1
-; CHECK-NEXT: vsetvli zero, a1, e16, m4, tu, ma
-; CHECK-NEXT: vslideup.vx v8, v12, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 16 x bfloat> %v, bfloat %elt, i32 %idx
- ret <vscale x 16 x bfloat> %r
-}
-
-define <vscale x 32 x bfloat> @insertelt_nxv32bf16_0(<vscale x 32 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv32bf16_0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetvli a1, zero, e16, m1, tu, ma
-; CHECK-NEXT: vmv.s.x v8, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 32 x bfloat> %v, bfloat %elt, i32 0
- ret <vscale x 32 x bfloat> %r
-}
-
-define <vscale x 32 x bfloat> @insertelt_nxv32bf16_imm(<vscale x 32 x bfloat> %v, bfloat %elt) {
-; CHECK-LABEL: insertelt_nxv32bf16_imm:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a0, fa0
-; CHECK-NEXT: vsetivli zero, 4, e16, m1, tu, ma
-; CHECK-NEXT: vmv.s.x v16, a0
-; CHECK-NEXT: vslideup.vi v8, v16, 3
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 32 x bfloat> %v, bfloat %elt, i32 3
- ret <vscale x 32 x bfloat> %r
-}
-
-define <vscale x 32 x bfloat> @insertelt_nxv32bf16_idx(<vscale x 32 x bfloat> %v, bfloat %elt, i32 zeroext %idx) {
-; CHECK-LABEL: insertelt_nxv32bf16_idx:
-; CHECK: # %bb.0:
-; CHECK-NEXT: fmv.x.h a1, fa0
-; CHECK-NEXT: vsetvli a2, zero, e16, m1, ta, ma
-; CHECK-NEXT: vmv.s.x v16, a1
-; CHECK-NEXT: addi a1, a0, 1
-; CHECK-NEXT: vsetvli zero, a1, e16, m8, tu, ma
-; CHECK-NEXT: vslideup.vx v8, v16, a0
-; CHECK-NEXT: ret
- %r = insertelement <vscale x 32 x bfloat> %v, bfloat %elt, i32 %idx
- ret <vscale x 32 x bfloat> %r
-}
-
define <vscale x 1 x float> @insertelt_nxv1f32_0(<vscale x 1 x float> %v, float %elt) {
; CHECK-LABEL: insertelt_nxv1f32_0:
; CHECK: # %bb.0:
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