[llvm] [RISCV][GISEL] instruction-select vmclr (PR #110782)

[Michael Maitland via llvm-commits]

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@@ -50,6 +50,11 @@ def GIAddrRegImm :
   GIComplexOperandMatcher<s32, "selectAddrRegImm">,
   GIComplexPatternEquiv<AddrRegImm>;
 
+def GIVLOpS32 : GIComplexOperandMatcher<s32, "selectVLOp">,
+                GIComplexPatternEquiv<VLOp>;
+def GIVLOpS64 : GIComplexOperandMatcher<s64, "selectVLOp">,
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michaelmaitland wrote:

My understanding is that it'll try to match s32, and if it succeeds it will do the RISCVInstructionSelector::selectVLOp in place of `RISCVDAGToDAGISel::selectVLOp`, which is associated with `def VLOp : ComplexPattern<XLenVT, 1, "selectVLOp">;`. If it fails, it will repeat for i64. Only one will be true at a time because the operand cannot be both s32 and s64.

But maybe someone else can weigh in here, because I am not too familiar with how this works.

https://github.com/llvm/llvm-project/pull/110782