[llvm] [RISCV][GISEL] regbankselect for G_SPLAT_VECTOR (PR #110744)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 1 15:17:56 PDT 2024
================
@@ -478,6 +478,19 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
}
break;
}
+ case TargetOpcode::G_SPLAT_VECTOR: {
+ OpdsMapping[0] = getVRBValueMapping(MRI.getType(MI.getOperand(0).getReg())
+ .getSizeInBits()
+ .getKnownMinValue());
+
+ LLT ScalarTy = MRI.getType(MI.getOperand(1).getReg());
+ if (GPRSize == 32 && ScalarTy.getSizeInBits() == 64) {
+ assert(MF.getSubtarget<RISCVSubtarget>().hasStdExtD());
+ OpdsMapping[1] = getFPValueMapping(ScalarTy.getSizeInBits());
+ } else
+ OpdsMapping[1] = GPRValueMapping;
----------------
topperc wrote:
This should use `onlyDefinesFP` to get the FPR regbank when possible.
https://github.com/llvm/llvm-project/pull/110744
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