[llvm] [BPF] Use mul for certain div/mod operations (PR #110712)

[via llvm-commits]

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@@ -118,7 +118,9 @@ class BPFTargetLowering : public TargetLowering {
     return Op.size() >= 8 ? MVT::i64 : MVT::i32;
   }
 
-  bool isIntDivCheap(EVT VT, AttributeList Attr) const override { return true; }
+  bool isIntDivCheap(EVT VT, AttributeList Attr) const override {
+    return false;
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eddyz87 wrote:

Ok, I see both x86 and arm LLVM backends define this as expensive.
I somehow understood this as a knob whether to generate sdiv at all, while this is only an optimization knob.

However, the commit description says:
> The reason is that sdiv/smod is only supported at -mcpu=v4. At cpu v1/v2/v3, only udiv/umod is supported.
...
> Basically sdiv can be replaced with sub, shr and imul.

Do we also need to add some generic lowering for cpuv{1,2,3}?


https://github.com/llvm/llvm-project/pull/110712