[llvm] [RISCV][TTI] Recognize CONCAT_VECTORS if a shufflevector mask is multiple insert subvector. (PR #110457)

[Luke Lau via llvm-commits]

================
@@ -0,0 +1,18 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v | FileCheck %s
+
+define void @test() {
+; CHECK-LABEL: 'test'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %0 = shufflevector <8 x float> poison, <8 x float> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %1 = shufflevector <4 x i16> poison, <4 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
----------------
lukel97 wrote:

Is this still overestimating the cost? Putting this into llc -mattr=+v:

```llvm
define <16 x i16> @f(<4 x i16> %a, <4 x i16> %b) {
  %c = shufflevector <4 x i16> %a, <4 x i16> %b, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
  ret <16 x i16> %c
}
```

I'm counting a total of 3 LMUL ops, so I think this should be costed as 3. 

```asm
f: 
	vmv1r.v	v10, v8
	vsetivli	zero, 8, e16, m1, ta, ma
	vslideup.vi	v10, v8, 4
	vmv2r.v	v8, v10
	vsetivli	zero, 16, e16, m2, ta, ma
	vslideup.vi	v8, v10, 8
	ret
```

https://github.com/llvm/llvm-project/pull/110457